IS62WV1288BLL-55QI-TR ISSI, IS62WV1288BLL-55QI-TR Datasheet

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IS62WV1288BLL-55QI-TR

Manufacturer Part Number
IS62WV1288BLL-55QI-TR
Description
the issi is62wv1288all / is62wv1288bll are high-speed, 1m bit static rams...
Manufacturer
ISSI
Datasheet
IS62WV1288ALL
IS62WV1288BLL
128K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 45ns, 55ns, 70ns
• CMOS low power operation:
• TTL compatible interface levels
• Single power supply:
• Fully static operation: no clock or refresh
• Three state outputs
• Industrial temperature available
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
06/20/05
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
30 mW (typical) operating
required
1.65V--2.2V V
2.5V--3.6V V
15 µW (typical) CMOS standby
DD
DD
(62WV1288BLL)
(62WV1288ALL)
I/O0-I/O7
A0-A16
V
GND
DD
CS2
CS1
WE
OE
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
1-800-379-4774
DESCRIPTION
The
speed, 1M bit static RAMs organized as 128K words by 8
bits. It is fabricated using
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When CS1 is HIGH (deselected) or when CS2 is LOW
(deselected), the device assumes a standby mode at which
the power dissipation can be reduced down with CMOS
input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV1288ALL and IS62WV1288BLL are packaged
in the JEDEC standard 32-pin TSOP (TYPEI), sTSOP
(TYPEI), SOP, and 36-pin mini BGA.
ISSI
MEMORY ARRAY
COLUMN I/O
128K x 8
IS62WV1288ALL / IS62WV1288BLL are high-
ISSI
's high-performance CMOS
ISSI
JUNE 2005
®
1

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IS62WV1288BLL-55QI-TR Summary of contents

Page 1

... Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62WV1288ALL and IS62WV1288BLL are packaged in the JEDEC standard 32-pin TSOP (TYPEI), sTSOP (TYPEI), SOP, and 36-pin mini BGA. ...

Page 2

... IS62WV1288ALL, IS62WV1288BLL PIN CONFIGURATION 36-pin mini BGA (B) (6mm x 8mm CS2 I/ I/ GND I/ CS1 I/O7 A16 A15 G A9 A10 A12 A13 A11 H PIN DESCRIPTIONS A0-A16 Address Inputs CS1 Chip Enable 1 Input CS2 ...

Page 3

... CS2 I/O Operation High High High OUT 1-800-379-4774 ISSI Value Unit +0 –0.2 to +3.8 V –65 to +150 °C 1.0 W IS62WV1288BLL 2.5V - 3.6V 2.5V - 3.6V Min. Max. DD 1.4 — 2.2 — — 0.2 — 0.4 1 0 0.3 DD –0.2 0.4 –0.2 0.6 –1 1 – Current ...

Page 4

... IS62WV1288ALL, IS62WV1288BLL (1) CAPACITANCE Symbol Parameter C Input Capacitance IN C Input/Output Capacitance OUT Note: 1. Tested initially and after any design or process changes that may affect these parameters. AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load 1 ...

Page 5

... IS62WV1288ALL, IS62WV1288BLL POWER SUPPLY CHARACTERISTICS 62WV1288ALL (1.65V - 2.2V) Symbol Parameter Test Conditions I V Dynamic Operating Supply Current I I Operating Supply Current I I TTL Standby Current (TTL Inputs) V CS1 = CMOS Standby CS1 V Current (CMOS Inputs) CS2 0.2V Note: 1 ...

Page 6

... IS62WV1288ALL, IS62WV1288BLL READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CS1/CS2 Access Time t t ACS1/ ACS2 OE Access Time t DOE OE to High-Z Output t (2) HZOE OE to Low-Z Output t (2) LZOE CS1/CS2 to High-Z Output ...

Page 7

... IS62WV1288ALL, IS62WV1288BLL AC WAVEFORMS (CS1, CS2, OE Controlled) READ CYCLE NO. 2 (1,3) ADDRESS OE CS1 t CS2 DOUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CS1 Address is valid prior to or coincident with CS1 LOW and CS2 HIGH transition. Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 8

... IS62WV1288ALL, IS62WV1288BLL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time WC CS1/CS2 to Write End t t SCS1/ SCS2 t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA WE Pulse Width t PWE t Data Setup to Write End SD t Data Hold from Write End ...

Page 9

... IS62WV1288ALL, IS62WV1288BLL AC WAVEFORMS (WE Controlled HIGH During Write Cycle) WRITE CYCLE NO. 2 ADDRESS OE CS1 CS2 WE t DOUT DATA UNDEFINED DIN (WE Controlled LOW During Write Cycle) WRITE CYCLE NO. 3 ADDRESS OE CS1 CS2 WE DOUT DIN Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 10

... IS62WV1288ALL, IS62WV1288BLL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V V for Data Retention Data Retention Current DR t Data Retention Setup Time SDR t Recovery Time RDR DATA RETENTION WAVEFORM (CS1 t SDR CS1 GND DATA RETENTION WAVEFORM (CS2 Controlled CS2 ...

Page 11

... IS62WV1288ALL, IS62WV1288BLL ORDERING INFORMATION IS62WV1288ALL (1.65V - 2.2V) Industrial Range: -40°C to +85°C Speed (ns) Order Part No. 70 IS62WV1288ALL-70BI IS62WV1288ALL-70HI IS62WV1288BLL (2.5V-3.6V) Industrial Range: -40°C to +85°C Speed (ns) Order Part No. 45 IS62WV1288BLL-45TI IS62WV1288BLL-45BI IS62WV1288BLL-45HI IS62WV1288BLL-45QI 55 IS62WV1288BLL-55TI IS62WV1288BLL-55TLI IS62WV1288BLL-55BI IS62WV1288BLL-55HI IS62WV1288BLL-55HLI IS62WV1288BLL-55QI IS62WV1288BLL-55QLI Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 12

... Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — ...

Page 13

... Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — ...

Page 14

... Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. 0.037 0.041 0.007 0.009 0.0055 0.0063 0.520 0.535 0.461 0.469 0.311 0.319 0.020 BSC 0.012 0.028 0.011 Typ. 0° 5° ISSI SEATING PLANE C ® ...

Page 15

... REF Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — ...

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