SY89859UMG Micrel Inc, SY89859UMG Datasheet - Page 4

• Manufacturer Part Number: SY89859UMG
• Description: IC MUX 8:1 LP 1:2 LVPECL 44MLF
• Manufacturer: Micrel Inc
• Series: SY89r
• Type: Multiplexerr

Specifications of SY89859UMG

• Circuit: 1 x 8:1
• Independent Circuits: 1
• Voltage Supply Source: Single Supply
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-MLF®, QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Other names: 576-1456

Micrel, Inc.
Pin Description
December 2007
24, 27, 29, 32
Pin Number
23, 28, 33
20, 18
16, 14
13, 11
42, 40
38, 36
19, 15
41, 37
25, 26
30, 31
1, 43
12, 8
4, 44
9, 7
5, 3
17
10
39
21
22
35
2
Exposed Pad
VREF-AC0
VREF-AC1
VREF-AC2
VREF-AC3
Pin Name
VT0, VT1
VT2, VT3
VT4, VT5
VT6, VT7
IN0, /IN0
IN1, /IN1
IN2, /IN2
IN3, /IN3
IN4, /IN4
IN5, /IN5
IN6, /IN6
IN7, /IN7
Q0, /Q0
Q1, /Q1
SEL0
SEL1
SEL2
GND
VCC
Pin Function
Differential Inputs: These input pairs are the differential signal inputs to the device.
Inputs accept AC- or DC-coupled signals as small as 100mV (200mVpp). Each pin of
a pair internally terminates to a VT pin through 50 Ω. Note that these inputs will default
to an indeterminate state if left open. Please refer to the “Input Interface Applications”
section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to a
VT pin. The VT pins provide a center-tap to a termination network for maximum
interface flexibility. See “Input Interface Applications” section for more details. For a
CML or LVDS inputs, the VT pin is left floating.
Reference Voltage: These outputs bias to V
coupling the inputs (IN, /IN). For AC-coupled applications, connect VREF-AC to the
VT pin and bypass with a 0.01µF low ESR capacitor to VCC. See “Input Interface
Applications” section for more details.
The single-ended TTL/CMOS-compatible inputs select the inputs to the multiplexer.
Note that this input is internally connected to a 25k Ω pull - up resistor and will default
to a logic HIGH state if left open. The threshold voltage is V
Positive Power Supply. Bypass with 0.1µF||0.01µF low ESR capacitors and place as
close to each VCC pin as possible.
Differential Outputs: These 100K-compatible LVPECL output pairs are the outputs of
the device. Unused output pairs may be left open. Each output is designed to drive
800mV into 50Ω terminated to V
Ground. GND and exposed pad must both be connected to the same ground plane.
4
CC
–2V.
CC
–1.2V. They are used when AC
[e-mail]
TH
= V
CC
/2.
M9999-120607-D
or [phone]
SY89859U