650R-07ILF IDT, 650R-07ILF Datasheet - Page 5
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650R-07ILF
Manufacturer Part Number
650R-07ILF
Description
Clock Drivers & Distribution SYSTEM PERIPHERAL CLOCK SOURCE
Manufacturer
IDT
Datasheet
1.650R-07ILF.pdf
(9 pages)
Specifications of 650R-07ILF
Rohs
yes
Part # Aliases
ICS650R-07ILF
External Components
The ICS650-07C requires a minimum number of external
components for proper operation.
Decoupling Capacitor
Decoupling capacitors of 0.01µF must be connected
between each VDD and GND (pins 4 and 6, pins 16 and 14),
as close to the device as possible. For optimum device
performance, the decoupling capacitor should be mounted
on the component side of the PCB. Avoid the use of vias in
the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50 trace (a commonly used trace
Absolute Maximum Ratings
Recommended Operation Conditions
IDT™ / ICS™ NETWORKING CLOCK SOURCE
ICS650-07C
NETWORKING CLOCK SOURCE
Stresses above the ratings listed below can cause permanent damage to the ICS650-07C. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Storage Temperature
Junction Temperature
Soldering Temperature (20 seconds max)
Parameter
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Power Supply Voltage (measured with respect to GND)
Item
5
impedance) place a 33 resistor in series with the clock line,
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20 .
Crystal Information
The crystal used should be a fundamental mode (do not use
third overtone), parallel resonant. Crystal capacitors should
be connected from pins X1 to ground and X2 to ground to
optimize the initial accuracy. The value of these capacitors
is given by the following equation:
In the equation, C
crystal with a 16 pF load capacitance, two 20 pF capacitors
should be used. If a clock input is used, drive it into X1 and
leave X2 unconnected.
Crystal caps (pF) = (C
Min.
+3.0
7 V
-0.5 V to VDD+0.5 V
0 to +70 C
-40 to +85 C
-65 to +150 C
125 C
260 C
-40
0
L
Typ.
+3.3
is the crystal load capacitance. So, for a
Rating
L
- 6) x 2
Max.
+5.5
+70
+85
CLOCK SYNTHESIZER
ICS650-07C
Units
V
C
C
REV D 102709