851021AYLF IDT, 851021AYLF Datasheet - Page 12

• Manufacturer Part Number: 851021AYLF
• Description: Clock Drivers & Distribution
• Manufacturer: IDT

Specifications of 851021AYLF

• Product Category: Clock Drivers & Distribution
• Rohs: yes
• Part # Aliases: ICS851021AYLF

ICS851021 Data Sheet
This section provides information on power dissipation and junction temperature for the ICS851021.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS851021 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The maximum
recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the
bond wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow and a multi-layer board, the appropriate value is 31.8°C/W per Table 4 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
ICS851021AY REVISION B MARCH 3, 2010
ABLE
•
•
4. T
Multi-Layer PCB, JEDEC Standard Test Boards
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 21 * 47.3mW = 993.3mW
Total Power
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in Section 1 above)
T
70°C + 1.357W * 31.8°C/W = 113.2°C. This is below the limit of 125°C.
JA
A
= Ambient Temperature
HERMAL
= Junction-to-Ambient Thermal Resistance
R
MAX
ESISTANCE
_MAX
= V
MAX
= 47.3mW/Loaded Output pair
DD_MAX
(3.465V, with all outputs switching) = 363.83mW + 993.3mW = 1357.13mW
θ θ θ θ θ
* I
JA
DD_MAX
FOR
= 3.465V * 105mA = 363.83mW
64-P
DD
θ θ θ θ θ
= 3.3V + 5% = 3.465V, which gives worst case results.
P
IN
JA
TQFP, F
by Velocity (Meters per Second)
OWER
JA
* Pd_total + T
ORCED
C
ONSIDERATIONS
A
C
12
ONVECTION
31.8°C/W
1-TO-21, DIFFERENTIAL CURRENT MODE 0.7V HCSL FANOUT BUFFER
0
25.8°C/W
1
JA
©2010 Integrated Device Technology, Inc.
must be used. Assuming no air
24.2°C/W
2.5