1337GDCGI IDT, 1337GDCGI Datasheet
![no-image](/images/no-image-200.jpg)
1337GDCGI
Specifications of 1337GDCGI
Related parts for 1337GDCGI
1337GDCGI Summary of contents
Page 1
... REAL-TIME CLOCK WITH I General Description The IDT1337G device is a low power serial real-time clock (RTC) device with two programmable time-of-day alarms and a programmable square-wave output. Address and data are transferred serially through an I provides seconds, minutes, hours, day, date, month, and year information ...
Page 2
... X2 2 IDT1337G INTA 3 GND 4 Pin Assignment (16-pin SOIC) 1 SCL SQW/INTB 2 VCC IDT1337G IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE Pin Assignment 8 VCC 7 SQW/INTB 6 SCL 5 SDA 16 SDA 15 GND 14 INTA (16-pin QFN) ...
Page 3
... X2 capacitance (CL pF. An external 32.768 kHz oscillator can also drive the IDT1337G. In this configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is left floating. Interrupt output. When enabled, INTA is asserted low when the time/day/date INTA matches the values set in the alarm registers ...
Page 4
... I C interface whenever VCC 2 is between 5.5 V and 1 operation is not guaranteed when VCC is below 1.8 V. The IDT1337G maintains the time and date when VCC is as low as 1.3 V. The following sections discuss in detail the Oscillator block, Clock/Calendar Register Block and Serial I Oscillator Block ...
Page 5
... Load Capacitance C L PCB Design Consideration • Signal traces between IDT device pins and the crystal must be kept as short as possible. This minimizes parasitic capacitance and sensitivity to crosstalk and EMI. Note that the trace capacitances play a role in the effective crystal load capacitance calculation. ...
Page 6
... C SERIAL INTERFACE Address Map Table 2 (Timekeeper Registers) shows the address map for the IDT1337G registers. During a multibyte access, when the address pointer reaches the end of the register space (0Fh), it wraps around to location 00h address pointer incrementing to location 00h, the current time is transferred to a second set of registers. The time information is read from these secondary registers, while the clock may continue to run ...
Page 7
... The IDT1337G can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the 12- or 24-hour mode-select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20– ...
Page 8
... Special-Purpose Registers The IDT1337G has two additional registers (control and status) that control the RTC, alarms, and square-wave output. Control Register (0Eh) Bit 7 Bit 6 Bit 5 EOSC 0 0 Bit 7: Enable Oscillator (EOSC). This active-low bit when set to logic 0 starts the oscillator. When this bit is set to a logic 1, the oscillator is stopped ...
Page 9
... Bit 0: Alarm 1 Flag (A1F). A logic 1 in the Alarm 1 Flag bit indicates that the time matched the alarm 1 registers. If the A1IE bit is also a logic 1, the INTA pin goes low. A1F is cleared when written to logic 0. This bit can only be written to logic 0. Attempting to write to logic 1 leaves the value unchanged. 2 IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE Bit 4 Bit 3 ...
Page 10
... A master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions must control the bus. The IDT1337G operates as a slave on 2 the I C bus. Within the bus specifications, a standard mode (100 kHz maximum clock rate) and a fast mode (400 kHz maximum clock rate) are defined ...
Page 11
... However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is transmitted on SDA by the IDT1337G while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer (see the “Data Read– ...
Page 12
... Data Read (Write Pointer, then Read) – Slave Receive and Transmit 2 IDT®™™ REAL-TIME CLOCK WITH I C SERIAL INTERFACE read is the last one stored in the register pointer. The IDT1337G must receive a “not acknowledge” to end a read. 12 RTC IDT1337G REV L 102412 ...
Page 13
... Stresses above the ratings listed below can cause permanent damage to the IDT1337G. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. ...
Page 14
... Enabled) Data-Retention Current (Oscillator Disabled) Unless stated otherwise, VCC = 1 1.8 V, Ambient Temp. -40 to +105 C (extended), Note 1 Parameter Timekeeper Current (Oscillator Enabled) Data-Retention Current (Oscillator Disabled) 2 IDT®™™ REAL-TIME CLOCK WITH I C SERIAL INTERFACE Symbol Conditions I Note Note 3 LO ...
Page 15
... Fall Time of Both SDA and SCL Signals, Note 14 Setup Time for STOP Condition Capacitive Load for Each Bus Line, Note 14 I/O Capacitance (SDA, SCL) 32.768 kHz Clock Accuracy with External Crystal 2 IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE Symbol Conditions f Fast Mode SCL Standard Mode t ...
Page 16
... LOW period of the SCL signal, it must output the next data bit to the SDA line 1000 + 250 = 1250 ns before the SCL line is released. SU:DAT Note 14: C —total capacitance of one bus line in pF. B Note 15: Guaranteed by design. Not production tested. 2 IDT®™™ REAL-TIME CLOCK WITH I C SERIAL INTERFACE Symbol Conditions T =25° =3.3 V ...
Page 17
... IDT1337G REA LTIME CLOCK WITH SERIAL INTERFACE Timing Diagram 2 IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE 17 RTC IDT1337G REV L 102412 ...
Page 18
... Temperature (C) 2 IDT®™™ REAL-TIME CLOCK WITH I C SERIAL INTERFACE INTCN=1 INTCN 4.3 5.3 1.3 32768.4 32768.38 32768.36 INTCN=1 INTCN=0 32768.34 32768.32 32768 IccA vs Vcc 2.3 3.3 4.3 Vcc (V) Oscillator Frequency vs Vcc (as measured on one IDT1337C sample) 1.3 2.3 3.3 4.3 Vcc(V) IDT1337G RTC ICCA 5.3 Freq 5.3 REV L 102412 ...
Page 19
... Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Thermal Characteristics for 16-pin QFN Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case 2 IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE Symbol Conditions Min. Still air JA 1 m/s air flow JA 3 m/s air flow ...
Page 20
... YYWW is the last two digits of the year and week that the part was assembled. 5. “XXX” = traceability (lot code). 6. “G” denotes RoHS compliant package. 7. “I” denotes industrial grade. 8. Bottom marking: country of origin if not USA. 2 IDT®™™ REAL-TIME CLOCK WITH I C SERIAL INTERFACE Marking Diagram 9 Marking Diagram 8 ...
Page 21
... REA LTIME CLOCK WITH SERIAL INTERFACE Package Outline and Package Dimensions Package dimensions are kept current with JEDEC Publication No INDEX AREA IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE (8-pin SOIC, 150 Mil. Body) Symbol SEATING ...
Page 22
... Package Outline and Package Dimensions Package dimensions are kept current with JEDEC Publication No IDT®™™ REAL-TIME CLOCK WITH I C SERIAL INTERFACE (8-pin MSOP, 3.00 mm Body) Symbol ...
Page 23
... Package Outline and Package Dimensions Package dimensions are kept current with JEDEC Publication No INDEX AREA IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE (16-pin SOIC, 300 mil Body) Symbol aaa *For reference only. Controlling dimensions in mm. A ...
Page 24
... A1 0 0.05 A3 0.20 Reference b 0.18 0.30 e 0.50 BASIC BASIC 3.00 x 3.00 D2 1.55 1.80 E2 1.55 1.80 L 0.30 0.50 2 IDT®™™ REAL-TIME CLOCK WITH I C SERIAL INTERFACE (16-pin QFN 3x3mm (Ref Sawn E2 E2 Singulation 2 A (Ref & Odd C 0. (Ref) N & ...
Page 25
... The 1337GC packages are RoHS compliant. Packages without the integrated crystal are Pb-free; packages that include the integrated crystal (as designated with a “C” before the two-letter package code) may include lead that is exempt under RoHS requirements. The lead finish is JESD91 category e3. “ ...
Page 26
... Fab4. Notification of a change in orderables was initiated with PCN A1208-06 Updated 16-pin SOIC marking diagram and ordering information to include "A". L 10/24/12 A. Tsui 1. Updated IDD specs per TSMC’s characterization data. 2. Updated top-side device markings. 2 IDT® REAL-TIME CLOCK WITH I C SERIAL INTERFACE 26 RTC IDT1337G REV L 102412 ...
Page 27
... Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners ...