DS3232SN#-W Maxim Integrated, DS3232SN#-W Datasheet
DS3232SN#-W
Specifications of DS3232SN#-W
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DS3232SN#-W Summary of contents
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... SO Package ♦ Underwriters Laboratories Recognized CC PART DS3232S# DS3232SN# Applications # Denotes a RoHS-compliant device that may include lead that is exempt under the RoHS requirements. Lead finish is JESD97 Category e3, and is compatible with both lead-based and lead-free soldering processes. A "#" anywhere on the top mark denotes a RoHS-compliant device ...
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... A Active supply > 3.3V, V 3.3V > active supply > 2.7V, OH 2.7V > active supply > 2.3V MIN TYP 2.3 3.3 2.3 3.0 0 +0.3 x -0.3 MIN TYP 5.5V CC 2.45 2.575 2.0 MAX UNITS 5 MAX UNITS 200 µA 325 120 µA 160 500 µA 600 2. Maxim Integrated ...
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... CC BAT A PARAMETER Active Battery Current (Note 5) Timekeeping Battery Current (Note 5) Temperature Conversion Current Data-Retention Current Maxim Integrated Extremely Accurate I Integrated Crystal and SRAM = -40°C to +85°C, unless otherwise noted.) (Typical values are SYMBOL CONDITIONS 3mA OL ...
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... B 300 0.1C 300 B 0.6 µs 4.7 400 250 250 ms 100 ms 125 200 ms MIN TYP MAX UNITS 300 µs 0 µs 125 300 ms Maxim Integrated ...
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... RST PF(MAX) V PF(MIN) t VCCF RST Maxim Integrated Extremely Accurate I Integrated Crystal and SRAM DS3232 2 C RTC with Pushbutton Reset Timing t RST Power-Switch Timing VCCR t REC 5 ...
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... C interface is imposed by the timeout period. ≤ 3.4V. BAT 2 Data Transfer Serial Bus HD:STA t SU:STA . IH(MIN the SCL signal. LOW ≥ 250ns must then be met. This SU:DAT + t = 1000 + 250 = 1250ns R(MAX) SU:DAT is bypassed and RST immediately REC t SU:STO of the SCL signal) Maxim Integrated ...
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... V (V) CC SUPPLY CURRENT vs. TEMPERATURE 0.900 BB32kHz = 0 0.800 0.700 0.600 -40 - TEMPERATURE (°C) Maxim Integrated Extremely Accurate I Integrated Crystal and SRAM Typical Operating Characteristics SCL = SDA = V CC 4.3 4.8 5 3.4V BAT V = 3.0V BAT DELTA TIME AND FREQUENCY vs. TEMPERATURE 20 0 CRYSTAL -20 +20ppm ...
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... A temperature-compensated voltage reference and comparator circuit monitors the level of V Block Diagram N SQUARE-WAVE BUFFER; INT/SQW CONTROL V CC VOLTAGE REFERENCE; DEBOUNCE CIRCUIT; PUSHBUTTON RESET N CONTROL AND STATUS REGISTERS SRAM CLOCK AND CALENDAR REGISTERS USER BUFFER (7 BYTES bus interface. CC Maxim Integrated 32kHz INT/SQW RST to detect ...
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... The block diagram shows the main elements of the DS3232. The eight blocks can be grouped into four functional groups: TCXO, power control, pushbutton function, and RTC. Their operations are described sep- arately in the following sections. Maxim Integrated Extremely Accurate I Integrated Crystal and SRAM FUNCTION falls below V , the pin is driven low ...
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... REC Real-Time Clock greater than the mini- CC BAT Address Map Interface 2 C interface is accessible whenever either valid level microcontroller connected to ), the DS3232 DB , the RST pin bypassed and SRAM 2 C address other CC Maxim Integrated ...
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Figure 1. Address Map for DS3232 Timekeeping Registers and SRAM BIT 7 ADDRESS BIT 6 MSB 00h 0 10 Seconds 01h 0 10 Minutes AM/PM 02h 0 12/24 20 Hour 03h 0 0 04h 0 0 05h Century 0 06h ...
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... Alarm when day, hours, minutes, and seconds match ALARM RATE Alarm once per minute (00 seconds of every minute) Alarm when minutes match Alarm when hours and minutes match Alarm when date, hours, and minutes match Alarm when day, hours, and minutes match Alarms Maxim Integrated ...
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BIT 7 BIT 6 EOSC NAME: BBSQW POR POR is defined as the first application of power to the device, either V Special-Purpose Registers The DS3232 has two additional registers (control and control/status) that control the real-time ...
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... INT/SQW pin is also asserted. A1F is cleared when written to logic 0. This bit can only be written to logic 0. Attempting to write to logic 1 leaves the value unchanged. SAMPLE RATE (seconds) 64 128 256 512 Control/Status Register (0Fh) BIT 2 BIT 1 BSY A2F BIT 0 A1F 0 Maxim Integrated ...
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BIT 7 BIT 6 NAME: SIGN DATA POR BIT 7 BIT 6 NAME: SIGN DATA POR BIT 7 BIT 6 NAME: DATA DATA POR BIT 7 BIT 6 NAME POR ...
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... R/W bit, two types of data transfer are possible: Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is MSB LSB ACK DATA ACK/ NACK 9 1– STOP CONDITION REPEATED START 2 C bus. Depending upon the state of Maxim Integrated ...
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ADDRESS> <R/W> <WORD ADDRESS (n)> S 1101000 START A - ACKNOWLEDGE (ACK STOP R/W - READ/WRITE OR DIRECTION BIT ADDRESS Figure 3. Data Write—Slave Receiver Mode <SLAVE ADDRESS> <R/W> S 1101000 1 A ...
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... RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE PACKAGE TYPE CODE 20 SO W20#H2 and Assembly Chip Information OUTLINE LAND NO. PATTERN NO. 21-0042 90-0108 Maxim Integrated ...
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... Operation section and improved some sections of text for the Aging BAT 2 C timing diagrams (Figures 3, 4, and 5) capacitor representation in the Typical Operating Circuit; in the BAT The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc. DS3232 2 C RTC with Revision History PAGES CHANGED — ...