SSTUAF32868AHLF IDT, Integrated Device Technology Inc, SSTUAF32868AHLF Datasheet - Page 9

• Manufacturer Part Number: SSTUAF32868AHLF
• Description: IC REGIST BUFF 25BIT DDR2 176BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of SSTUAF32868AHLF

• Logic Type: 1:1, 1:2 Configurable Registered Buffer
• Supply Voltage: 1.7 V ~ 1.9 V
• Number Of Bits: 28
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 176-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Parity and Standby Function Table
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
ICSSSTUAF32868A
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
RESET
1
2
3
QERR is LOW, it stays latched LOW for two clock cycles or until RESET is driven LOW.
4
error occurs on the clock cycle before the device enters the LPM and the QERR output is driven LOW, it stays
latched LOW for the LPM plus two clock cycles or until RESET is driven LOW.
H
H
H
H
H
H
H
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW to HIGH
↓ = HIGH to LOW
PAR_IN arrives one clock cycle after the data to which it applies.
This transition assumes QERR is HIGH at the crossing of CLK going HIGH and CLK going LOW. If
If DCS0, DCS1, and CSGEN are driven HIGH, the device is placed in low-power mode (LPM). If a parity
Floating
DCS0
X or
H
X
X
X
X
X
L
L
L
L
Floating
DCS1
X or
H
X
X
X
X
X
L
L
L
L
Floating
CLK
X or
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
Floating
CLK
Inputs
X or
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
1
Σ of Inputs = H (D1 - D28)
9
X or Floating
Even
Even
Even
Even
Odd
Odd
Odd
Odd
X
X
COMMERCIAL TEMPERATURE GRADE
X or Floating
ICSSSTUAF32868A
PAR_IN
H
H
H
H
X
X
L
L
L
L
2
Outputs
QERR
QERR
QERR
H
H
H
H
H
L
L
L
L
7094/15
0
0
3
4