M4A5-64/32-55VNC Lattice, M4A5-64/32-55VNC Datasheet - Page 33
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M4A5-64/32-55VNC
Manufacturer Part Number
M4A5-64/32-55VNC
Description
CPLD - Complex Programmable Logic Devices HI PERF E2CMOS PLD
Manufacturer
Lattice
Datasheet
1.M4A5-19296-10VNI.pdf
(62 pages)
Specifications of M4A5-64/32-55VNC
Rohs
yes
Memory Type
EEPROM
Number Of Macrocells
64
Maximum Operating Frequency
167 MHz
Delay Time
5 ns
Number Of Programmable I/os
256
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Number Of Product Terms Per Macro
20
Factory Pack Quantity
800
Supply Voltage - Max
5.25 V
Supply Voltage - Min
4.75 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M4A5-64/32-55VNC
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Company:
Part Number:
M4A5-64/32-55VNC48
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
BLOCK DIAGRAM – M4A3-256/160, M4A3-256/192
Block C
Block D
Block E
Block F
16
16
16
16
32
32
32
32
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O Cells
I/O Cells
Matrix
I/O Cells
Matrix
I/O Cells
Matrix
Matrix
72 X 98
72 X 98
Block B
72 X 98
72 X 98
Block G
16
16
16
16
16
16
16
16
16
36
16
36
36
16
16
16
36
16
16
16
16
16
16
16
4
4
4
4
4
4
4
4
4
4
4
4
16
16
16
16
32
32
32
32
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O Cells
I/O Cells
I/O Cells
I/O Cells
Matrix
Matrix
Matrix
Matrix
72 X 98
72 X 98
Block A
72 X 98
72 X 98
Block H
16
16
16
16
16
16
16
16
16
36
16
36
36
16
16
16
36
16
16
16
ispMACH 4A Family
16
16
16
16
4
4
4
4
4
4
4
4
4
4
4
4
CLK0–CLK3
4
4
4
4
4
4
4
4
4
4
4
4
4
4
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Output Switch
Macrocells
I/O Cells
Macrocells
I/O Cells
I/O Cells
I/O Cells
Block P
72 X 98
Macrocells
72 X 98
Macrocells
72 X 98
72 X 98
Block I
16
16
16
36
36
16
16
16
16
16
16
36
36
16
16
16
Matrix
Matrix
Matrix
Matrix
16
16
16
16
16
16
16
16
32
32
32
32
16
16
16
16
4
4
4
4
4
4
4
4
4
4
4
4
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Output Switch
I/O Cells
Macrocells
I/O Cells
I/O Cells
Macrocells
Macrocells
I/O Cells
Macrocells
Block O
72 X 98
72 X 98
72 X 98
72 X 98
Block J
36
16
16
16
36
16
16
16
16
16
16
36
16
16
16
36
Matrix
Matrix
Matrix
Matrix
16
16
16
16
16
16
16
16
32
32
32
32
16
16
16
16
17466G-050
Block N
Block M
Block L
Block K
33