ispLSI 2064A-80LTN100 Lattice, ispLSI 2064A-80LTN100 Datasheet - Page 8

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ispLSI 2064A-80LTN100

Manufacturer Part Number
ispLSI 2064A-80LTN100
Description
CPLD - Complex Programmable Logic Devices USE ispMACH 4000V
Manufacturer
Lattice
Datasheet

Specifications of ispLSI 2064A-80LTN100

Rohs
yes
Memory Type
EEPROM
Number Of Macrocells
64
Maximum Operating Frequency
100 MHz
Delay Time
18.5 ns
Number Of Programmable I/os
64
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Package / Case
TQFP-100
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
175 mA
Supply Voltage - Max
5.25 V
Supply Voltage - Min
4.75 V
Power consumption in the ispLSI 2064 and 2064A de-
vices depends on two primary factors: the speed at which
the device is operating and the number of Product Terms
Figure 4. Typical Device Power Consumption vs fmax
I CC can be estimated for the ispLSI 2064/A using the following equation:
I CC (mA) = 38 + (# of PTs * 0.33) + (# of nets * Max freq * 0.007)
Where:
The I CC estimate is based on typical conditions (V CC = 5.0V, room temperature) and an assumption of two GLB loads
on average exists. These values are for estimates only. Since the value of I CC is sensitive to operating conditions
and the program in the device, the actual I CC should be verified.
Power Consumption
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
160
150
140
130
120
110
100
90
80
70
1
Notes: Configuration of Four 16-bit Counters
20
40
Typical Current at 5V, 25 ° C
f
60
max (MHz)
8
used. Figure 4 shows the relationship between power
and operating speed.
80
Specifications ispLSI 2064/A
ispLSI 2064/A
100 120 140
0127A/2064A

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