ispLSI 2096A-125LTN128 Lattice, ispLSI 2096A-125LTN128 Datasheet - Page 8

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ispLSI 2096A-125LTN128

Manufacturer Part Number
ispLSI 2096A-125LTN128
Description
CPLD - Complex Programmable Logic Devices USE ispMACH 4000V
Manufacturer
Lattice
Datasheet

Specifications of ispLSI 2096A-125LTN128

Rohs
yes
Number Of Macrocells
96
Maximum Operating Frequency
125 MHz
Delay Time
10 ns
Number Of Programmable I/os
96
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Package / Case
TQFP-128
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
295 mA
Supply Voltage - Max
5.25 V
Supply Voltage - Min
4.75 V
Power consumption in the ispLSI 2096 and 2096A de-
vices depends on two primary factors: the speed at which
the device is operating and the number of Product Terms
Figure 4. Typical Device Power Consumption vs fmax
I CC can be estimated for the ispLSI 2096/A using the following equation:
I CC (mA) = 20 + (# of PTs * 0.67) + (# of nets * Max freq * 0.011)
Where:
The I CC estimate is based on typical conditions (V CC = 5.0V, room temperature) and an assumption of two GLB loads
on average exists. These values are for estimates only. Since the value of I CC is sensitive to operating conditions
and the program in the device, the actual I CC should be verified.
Power Consumption
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
300
250
200
150
100
50
0
20
Notes: Configuration of six 16-bit counters
40
Typical current at 5V, 25°C
f
60
max (MHz)
8
80
used. Figure 4 shows the relationship between power
and operating speed.
ispLSI 2096/A
Specifications ispLSI 2096/A
100 120 140
0127/2096

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