LCMXO640C-5FN256C Lattice, LCMXO640C-5FN256C Datasheet - Page 26
LCMXO640C-5FN256C
Manufacturer Part Number
LCMXO640C-5FN256C
Description
CPLD - Complex Programmable Logic Devices 640 LUTS 159 I/O
Manufacturer
Lattice
Datasheet
1.LCMXO1200C-5TN100C.pdf
(96 pages)
Specifications of LCMXO640C-5FN256C
Rohs
yes
Memory Type
SRAM
Number Of Macrocells
320
Delay Time
3.5 ns
Number Of Programmable I/os
159
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA-256
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
17 mA
Supply Voltage - Max
3.465 V
Supply Voltage - Min
1.71 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO640C-5FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Figure 2-22. MachXO Configuration and Programming
Density Shifting
The MachXO family has been designed to enable density migration in the same package. Furthermore, the archi-
tecture ensures a high success rate when performing design migration from lower density parts to higher density
parts. In many cases, it is also possible to shift a lower utilization design targeted for a high-density device to a
lower density device. However, the exact details of the final resource utilization will impact the likely success in
each case.
Port
Mode
Program in seconds
Memory Space
Non-Volatile
Background
ISP 1149.1 TAP Port
microseconds
Download in
Power-up
Refresh
2-23
SRAM Memory
Space
1532
MachXO Family Data Sheet
Configure in milliseconds
Architecture
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