LCMXO640C-4F256I Lattice, LCMXO640C-4F256I Datasheet - Page 93
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LCMXO640C-4F256I
Manufacturer Part Number
LCMXO640C-4F256I
Description
CPLD - Complex Programmable Logic Devices Use LCMXO640C-4FT256
Manufacturer
Lattice
Datasheet
1.LCMXO1200C-5TN100C.pdf
(96 pages)
Specifications of LCMXO640C-4F256I
Memory Type
SRAM
Number Of Macrocells
320
Maximum Operating Frequency
550 MHz
Delay Time
4.2 ns
Number Of Programmable I/os
159
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Package / Case
FPBGA
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
17 mA
Supply Voltage - Max
3.465 V
Supply Voltage - Min
1.71 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO640C-4F256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
www.latticesemi.com
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
November 2007
For Further Information
A variety of technical notes for the MachXO family are available on the Lattice web site.
For further information on interface standards refer to the following web sites:
• TN1091,
• TN1089,
• TN1092,
• TN1090,
• TN1086,
• TN1087,
• TN1097,
• AN8066,
• JEDEC Standards (LVTTL, LVCMOS): www.jedec.org
• PCI: www.pcisig.com
MachXO sysIO Usage Guide
MachXO sysCLOCK Design and Usage Guide
Memory Usage Guide for MachXO Devices
Power Estimation and Management for MachXO Devices
MachXO JTAG Programming and Configuration User’s Guide
Minimizing System Interruption During Configuration Using TransFR Technology
MachXO Density Migration
Boundary Scan Testability with Lattice sysIO Capability
6-1
MachXO Family Data Sheet
Supplemental Information
DS1002 Further Information_01.2
Data Sheet DS1002