MC10LVEP16DTR2 ON Semiconductor, MC10LVEP16DTR2 Datasheet
MC10LVEP16DTR2
Specifications of MC10LVEP16DTR2
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MC10LVEP16DTR2 Summary of contents
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MC10LVEP16, MC100LVEP16 2.5V / 3.3V ECL Differential Receiver/Driver Description The MC10/100LVEP16 is a world class differential receiver/driver. The device is functionally equivalent to the EL16, EP16 and LVEL16 devices. With output transition times significantly faster than the EL16 and LVEL16, the ...
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Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note ...
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Table 3. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out I V Sink/Source Operating Temperature ...
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Table 4. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage Common Mode IHCMR Range (Differential Configuration) (Notes 5, 6) ...
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Table 6. 10EP DC CHARACTERISTICS, NECL Symbol Characteristic I Power Supply Current EE VOH Output HIGH Voltage (Note 12) V Output LOW Voltage (Note 12 Input HIGH Voltage (Single Ended Input LOW Voltage (Single Ended) IL ...
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Table 8. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 20 Output LOW Voltage (Note 20 Input HIGH Voltage (Single Ended Input LOW Voltage (Single Ended) ...
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Table 10. AC CHARACTERISTICS Symbol Characteristic f Maximum Frequency max (See Figure 2. F /JITTER) max t , Propagation Delay to PLH t Output Differential PHL t Duty Cycle Skew (Note 28) SKEW t CLOCK Random Jitter (RMS) JITTER @ ...
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... Q Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device MC10LVEP16D MC10LVEP16DG MC10LVEP16DR2 MC10LVEP16DR2G MC10LVEP16DT MC10LVEP16DTG MC10LVEP16DTR2 MC10LVEP16DTR2G MC10LVEP16MNR4 MC10LVEP16MNR4G MC100LVEP16D MC100LVEP16DG MC100LVEP16DR2 MC100LVEP16DR2G MC100LVEP16DT MC100LVEP16DTG MC100LVEP16DTR2 MC100LVEP16DTR2G MC100LVEP16MNR4 MC100LVEP16MNR4G † ...
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Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ...
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... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...
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K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...
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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...