MAX1166BEUP-T Maxim Integrated, MAX1166BEUP-T Datasheet - Page 8
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MAX1166BEUP-T
Manufacturer Part Number
MAX1166BEUP-T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet
1.MAX1165BEUI-T.pdf
(15 pages)
Specifications of MAX1166BEUP-T
Number Of Channels
1
Architecture
SAR
Conversion Rate
165 KSPs
Resolution
16 bit
Input Type
Single-Ended
Snr
90 dB
Interface Type
Parallel
Operating Supply Voltage
2.7 V to 5.25 V, 4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-20
Maximum Power Dissipation
879 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V
The MAX1165/MAX1166 use a successive-approxima-
tion (SAR) conversion technique with an inherent track-
and-hold (T/H) stage to convert an analog input into a
16-bit digital output. Parallel outputs provide a high-
speed interface to most microprocessors (µPs). The
Functional Diagram shows a simplified internal archi-
tecture of the MAX1165/MAX1166. Figure 3 shows a
typical application circuit for the MAX1166.
Low-Power, 16-Bit Analog-to-Digital Converter
with Parallel Interface
Figure 1. Load Circuits
8
Figure 2. MAX1165/MAX1166 Timing Diagram
D0–D15
a) HIGH-Z TO V
_______________________________________________________________________________________
1mA
AND V
OH
TO HIGH-Z
DGND
OH
, V
OL
TO V
OH
D8/D15–
,
D0–D15
D0/D7*
C
HBEN*
LOAD
Detailed Description
EOC
R/C
CS
*HBEN AND BYTE-WIDE DATA BUS
AVAILABLE ON MAX1166 ONLY.
= 20pF
Converter Operation
HIGH-Z
t
t
DH
CSL
D0–D15
b) HIGH-Z TO V
AND V
1mA
t
ACQ
OL
t
CSH
TO HIGH-Z
DV
OL
DD
, V
t
DGND
DS
C
OH
REF POWER-
LOAD
DOWN BIT
TO V
= 20pF
OL
,
t
CONV
The equivalent input circuit is shown in Figure 4. A
switched capacitor digital-to-analog converter (DAC)
provides an inherent T/H function. The single-ended
input is connected between AIN and AGND.
The ADC’s input-tracking circuitry has a 4MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid aliasing of
unwanted high-frequency signals into the frequency
band of interest, use anti-alias filtering.
Internal protection diodes, which clamp the analog
input to AV
from AGND - 0.3V to AV
the device.
If the analog input exceeds 300mV beyond the sup-
plies, limit the input current to 10mA.
t
DV
t
DO
HIGH-/LOW-
BYTE VALID
DD
DATA VALID
and/or AGND, allow the input to swing
t
DO1
HIGH-/LOW-
BYTE VALID
Analog Input Protection
DD
t
t
t
EOC
BR
BR
+ 0.3V, without damaging
HIGH-Z
Input Bandwidth
Analog Input