MAX1204ACAP-T Maxim Integrated, MAX1204ACAP-T Datasheet - Page 15

• Manufacturer Part Number: MAX1204ACAP-T
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1204ACAP-T

• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 133 KSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Differential
• Snr: 66 dB
• Interface Type: 4-Wire (SPI, Microwire, TMS320)
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-20
• Maximum Power Dissipation: 640 mW
• Minimum Operating Temperature: 0 C
• Number Of Converters: 1
• Voltage Reference: 4.096 V

When power is first applied and if SHDN is not pulled
low, internal power-on reset circuitry activates the
MAX1204 in internal clock mode, ready to convert with
SSTRB = high. After the power supplies are stabilized,
the internal reset time is 100µs. No conversions should
be performed during this phase. SSTRB is high on
power-up, and if CS is low, the first logical 1 on DIN is
interpreted as a start bit. Until a conversion takes
place, DOUT shifts out zeros.
In addition to its shutdown function, SHDN also selects
internal or external compensation. The compensation
affects both power-up time and maximum conversion
speed. Compensated or not, the minimum clock rate is
100kHz due to droop on the sample-and-hold.
Figure 11a. External Clock Mode, 15 Clocks/Conversion Timing
Figure 11b. External Clock Mode, 16 Clocks/Conversion Timing
__________ Applications Information
Maxim Integrated
DOUT
SCLK
DIN
CS
SSTRB
DOUT
SCLK
DIN
CS
S
Reference-Buffer Compensation
CONTROL BYTE 0
S
1
CONTROL BYTE 0
Power-On Reset
8
5V, 8-Channel, Serial, 10-Bit ADC
B9
B9
B8
B8
B7
CONVERSION RESULT 0
B7
B6
B6
CONVERSION RESULT 0
B5
B5
B4
15
B4
B3
S
1
with 3V Digital Interface
B3
B2
B2
B1 B0 S1 S0
Float SHDN to select external compensation. The Typical
Operating Circuit uses a 4.7µF capacitor at REF. A value
of 4.7µF or greater ensures stability and allows converter
operation at the 2MHz full clock speed. External com-
pensation increases power-up time (see the section
Choosing Power-Down Mode, and Table 5).
Internal compensation requires no external capacitor at
REF, and is selected by pulling SHDN high. Internal com-
pensation allows for the shortest power-up times, but is
only available using an external clock up to 400kHz.
You can save power by placing the converter in a
low-current shutdown state between conversions.
Select full power-down or fast power-down mode via
bits 1 and 0 of the DIN control byte with SHDN high or
open (Tables 2 and 6). Pull SHDN low at any time to shut
down the converter completely. SHDN overrides bits 1
and 0 of the control byte.
CONTROL BYTE 1
S
B1 B0 S1 S0
CONTROL BYTE 1
8
B9
B8
B7
Choosing Power-Down Mode
CONVERSION RESULT 1
B6
B5
B9
CONVERSION RESULT 1
B4
15
MAX1204
B3
S
B8
1
B2
CONTROL BYTE 2
B7
B1 B0 S1 S0
Power-Down
B6
B5
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