MAX1156BCUP+ Maxim Integrated, MAX1156BCUP+ Datasheet - Page 9
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MAX1156BCUP+
Manufacturer Part Number
MAX1156BCUP+
Description
Analog to Digital Converters - ADC 14-Bit 135ksps 4.2V Precision ADC
Manufacturer
Maxim Integrated
Datasheet
1.MAX1174AEUP.pdf
(15 pages)
Specifications of MAX1156BCUP+
Rohs
yes
Number Of Channels
1
Architecture
SAR
Conversion Rate
135 KSPs
Resolution
14 bit
Input Type
Single-Ended
Snr
85 dB
Interface Type
Parallel
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Package / Case
TSSOP-20
Maximum Power Dissipation
879 mW
Minimum Operating Temperature
0 C
Number Of Converters
1
Voltage Reference
Internal, External
Figure 4. Equivalent Input Circuit
The MAX1156/MAX1158/MAX1174 have a selectable
standby or low-power shutdown mode. In standby
mode, the ADC’s internal reference and reference
buffer do not power down between conversions, elimi-
nating the need to wait for the reference to power up
before performing the next conversion. Shutdown mode
powers down the reference and reference buffer after
completing a conversion. The reference and reference
buffer require a minimum of 12ms (C
C
The state of R/C at the second falling edge of CS
selects which power-down mode the MAX1156/
MAX1158/MAX1174 enter upon conversion completion.
Holding R/C low causes the MAX1156/MAX1158/
MAX1174 to enter standby mode. The reference and
buffer are left on after the conversion completes. R/C
high causes the MAX1156/MAX1158/MAX1174 to enter
shutdown mode and power down the reference and
buffer after conversion (see Figures 5 and 6). Set the
voltage at R/C high during the second falling edge of
CS to realize the lowest current operation.
REF
AIN
= 10µF) to power up and settle from shutdown.
Selecting Standby or Shutdown Mode
MAX1156
R2
14-Bit, 135ksps, Single-Supply ADCs with
R3
_______________________________________________________________________________________
161Ω
R1
3.4kΩ
TRACK
HOLD
S1
S1, S2 = T/H SWITCH
S3 = POWER-DOWN
C
REFADJ
30pF
(MAX1158/MAX1174 ONLY)
HOLD
TRACK
= 0.1µF,
S2
HOLD
Bipolar Analog Input Range
T/H OUT
AIN
While in standby mode, the supply current is less than
3.7mA (typ). The next falling edge of CS with R/C low
causes the MAX1156/MAX1158/MAX1174 to exit stand-
by mode and begin acquisition. The reference and ref-
erence buffer remain active to allow quick turn-on time.
In shutdown mode, the reference and reference buffer
are shut down between conversions. Shutdown mode
reduces supply current to 0.5µA (typ) immediately after
the conversion. The next falling edge of CS with R/C
low causes the reference and buffer to wake up and
enter acquisition mode. To achieve 14-bit accuracy,
allow 12ms (C
internal reference to wake up.
The internal reference of the MAX1156/MAX1158/
MAX1174 is internally buffered to provide +4.096V out-
put at REF. Bypass REF to AGND and REFADJ to
AGND with 10µF and 0.1µF, respectively. Sink or
source current at REFADJ to make fine adjustments to
the internal reference. The input impedance of REFADJ
is nominally 5kΩ. Use the circuit of Figure 7 to adjust
the internal reference to ±1.5%.
R2 = 7.85kΩ (MAX1158)
R3 = 5.45kΩ (MAX1158)
MAX1158/MAX1174
OR 3.92kΩ (MAX1156/MAX1174)
OR 17.79kΩ (MAX1156/MAX1174)
R2
R3
161Ω
Internal and External Reference
REFADJ
POWER-
DOWN
S3
R1
3.4kΩ
= 0.1µF, C
TRACK
HOLD
S1
REF
C
30pF
HOLD
TRACK
REF
Internal Reference
Shutdown Mode
= 10µF) for the
Standby Mode
S2
HOLD
T/H OUT
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