STM32F373VCH6 STMicroelectronics, STM32F373VCH6 Datasheet - Page 85

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STM32F373VCH6

Manufacturer Part Number
STM32F373VCH6
Description
ARM Microcontrollers - MCU 32-Bit ARM Cortex M4 72MHz 256kB MCU FPU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F373VCH6

Product Category
ARM Microcontrollers - MCU
Rohs
yes
Core
ARM Cortex M4F
Processor Series
STM32F373xx
Data Bus Width
32 bit
Maximum Clock Frequency
72 MHz
Program Memory Size
256 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
BGA-100
Mounting Style
SMD/SMT

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0
STM32F37x
Note:
Output voltage levels
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
Table 53.
1. VDDSD12 is the external power supply for PB2, PB10, and PE7 to PE15 I/O pins (the I/O ground pin is
2. The I
3. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
4. The I
5. Data based on design simulation.
I/O pins are powered from V
- PB2, PB10 and PE7 to PE15 I/O pins are powered from VDDSD12.
- PB14 to PB15 and PD8 to PD15 I/O pins are powered from VDDSD3. All I/O pin ground is
internally connected to V
V
VDDSD12 or VDDSD3).
V
V
V
Symbol
V
V
DD
V
OLFM+
V
V
V
OH
OH
OL
OL
internally connected to VSS). VDDSD3 is the external power supply for PB14 to PB15 and PD8 to PD15
I/O pins (the I/O ground pin is internally connected to VSS). For those pins all V
table are related to their given VDDSDx power supply.
and the sum of I
Table 20
OH
OH
OL
OL
mentioned in the
(2)(5)
(2)(5)
(4)(5)
(4)(5)
22. All I/Os are CMOS and TTL compliant (FT, TTa or TC unless otherwise specified).
(2)
(2)
(4)
(4)
IO
IO
(2)
current sunk by the device must always respect the absolute maximum rating specified in
current sourced by the device must always respect the absolute maximum rating specified in
and the sum of I
Output low level voltage for an I/O pin
Output high level voltage for an I/O pin
Output low level voltage for an I/O pin
Output high level voltage for an I/O pin
Output low level voltage for an I/O pin
Output high level voltage for an I/O pin
Output low level voltage for an I/O pin
Output high level voltage for an I/O pin
Output low level voltage for a FTf I/O pins
in FM+ mode
Output voltage characteristics
IO
(I/O ports and control pins) must not exceed I
Table 53
IO
SS
Parameter
(I/O ports and control pins) must not exceed I
.
DD
Doc ID 022691 Rev 3
represents power voltage for a given I/O pin (VDD or
voltage except pins which can be used as SDADC inputs:
DD
(1)
supply voltage conditions summarized in
2.7 V < V
2.7 V < V
2.7 V < V
2.7 V < V
2 V < V
Table 53
CMOS port
I
I
VSS
Conditions
I
I
IO
I
IO
TTL port
IO
IO
IO
= +20 mA
= +20 mA
.
= +8 mA
= +8 mA
= +6 mA
DD
DD
DD
DD
DD
are derived from tests
< 2.7 V
VDD
< 3.6 V
< 3.6 V
< 3.6 V
< 3.6 V
(3)
(3)
Electrical characteristics
.
DD
supply references in this
V
V
V
DD
DD
DD
Min
2.4
-
-
-
-
-
–0.4
–1.3
–0.4
Table 20
Max Unit
0.4
0.4
1.3
0.4
0.4
-
-
-
-
85/128
V

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