MPC8308VMAGDA Freescale Semiconductor, MPC8308VMAGDA Datasheet - Page 47
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MPC8308VMAGDA
Manufacturer Part Number
MPC8308VMAGDA
Description
Microprocessors - MPU E300 MP PbFr 400
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8308VMAGDA.pdf
(83 pages)
Specifications of MPC8308VMAGDA
Rohs
yes
Processor Series
MPC8308
Core
e300
Maximum Clock Frequency
400 MHz
Interface Type
I2C, JTAG, UART
Operating Supply Voltage
0.95 V to 1.05 V
Maximum Operating Temperature
0 C to + 105 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-473
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8308VMAGDA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
13.2.2
This figure provides the data and command input timing diagram.
13.3
This table provides the eSDHC AC timing specifications.
At recommended operating conditions NV
Freescale Semiconductor
SD_CLK clock frequency—high speed mode
SD_CLK clock cycle
SD_CLK clock frequency—identification mode
SD_CLK clock low time
SD_CLK clock high time
SD_CLK clock rise and fall times
Input setup times: SD_CMD, SD_DATx
Input hold times: SD_CMD, SD_DATx
Output delay time: SD_CLK to SD_CMD, SD_DATx valid
Output Hold time: SD_CLK to SD_CMD, SD_DATx invalid
SD Card Input Setup
SD Card Input Hold
eSDHC AC Timing Specifications
Full Speed Input Path (Read)
Output from the
MPC8308 Pins
SD CLK at the
MPC8308 Pin
SD Card Pins
the Card Pin
Input at the
SD CLK at
Table 40. eSDHC AC Timing Specifications for High Speed Mode
Parameter
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
DD
= 3.3 V ± 300 mV.
Figure 36. Full Speed Input Path
Driving
Symbol
t
t
t
t
t
t
SHSKHOV
SHSKHOX
t
t
Edge
SHSCKR/
SHSIVKH
SHSIXKH
f
SHSCKH
t
SHSCKL
SHSCKF
t
f
SHSCK
SHSCK
ODLY
SIDCK
t
ISU
t
t
OH
IH
t
t
SFSIXKH
SFSCK
1
t
CLK_DELAY
(Clock Cycle)
Enhanced Secure Digital Host Controller (eSDHC)
Min
20
–3
—
t
0
0
7
7
3
2
3
6
2
SFSIVKH
t
DATA_DELAY
Max
400
50
—
—
—
—
—
—
—
—
—
3
(MPC8308 Input Hold)
Sampling
Edge
MHz
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
—
—
3
2
2
2
2
2
2
2
3
3
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