STM32L152C6U6 STMicroelectronics, STM32L152C6U6 Datasheet - Page 19

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STM32L152C6U6

Manufacturer Part Number
STM32L152C6U6
Description
ARM Microcontrollers - MCU 32-Bit ARM Cortex 32kb LP LCD MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32L152C6U6

Product Category
ARM Microcontrollers - MCU
Rohs
yes
Core
ARM Cortex M3
Data Bus Width
32 bit

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STM32L151x6/8/B, STM32L152x6/8/B
Note:
3.3.3
3.3.4
Five BOR thresholds are available through option bytes, starting from 1.8 V to 3 V. To
reduce the power consumption in Stop mode, it is possible to automatically switch off the
internal reference voltage (V
V
reset circuit.
The start-up time at power-on is typically 3.3 ms when BOR is active at power-up, the start-
up time at power-on can be decreased down to 1 ms typically for devices with BOR inactive
at power-up.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
levels between 1.85 V and 3.05 V, chosen by software, with a step around 200 mV. An
interrupt can be generated when V
V
a warning message and/or put the MCU into a safe state. The PVD is enabled by software.
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
Boot modes
At startup, boot pins are used to select one of three boot options:
The boot loader is located in System Memory. It is used to reprogram the Flash memory by
using USART1 or USART2. See STM32™ microcontroller system memory boot mode
AN2606 for details.
DD
DD
DD
/V
/V
is below a specified threshold, V
MR is used in Run mode (nominal regulation)
LPR is used in the Low-power run, Low-power sleep and Stop modes
Power down is used in Standby mode. The regulator output is high impedance, the
kernel circuitry is powered down, inducing zero consumption but the contents of the
registers and RAM are lost are lost except for the standby circuitry (wakeup logic,
IWDG, RTC, LSI, LSE crystal 32K osc, RCC_CSR).
Boot from Flash memory
Boot from System Memory
Boot from embedded RAM
DDA
DDA
power supply and compares it to the V
is higher than the V
REFINT
PVD
Doc ID 17659 Rev 8
threshold. The interrupt service routine can then generate
DD
) in Stop mode. The device remains in reset mode when
POR/PDR
/V
DDA
drops below the V
or V
PVD
BOR
threshold. This PVD offers 7 different
, without the need for any external
PVD
threshold and/or when
Functional overview
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