MAX5207AEUB+ Maxim Integrated, MAX5207AEUB+ Datasheet - Page 8

• Manufacturer Part Number: MAX5207AEUB+
• Description: Digital to Analog Converters - DAC 16Bit DAC w/Int Reference
• Manufacturer: Maxim Integrated

Specifications of MAX5207AEUB+

• Rohs: yes
• Number Of Converters: 1
• Number Of Dac Outputs: 1
• Resolution: 16 bit
• Interface Type: QSPI, SPI, Serial (3-Wire, 4-Wire, Microwire)
• Settling Time: 25 us
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: USOP
• Minimum Operating Temperature: - 40 C
• Output Type: Voltage
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Voltage Reference: External

The MAX5204–MAX5207 serial 16-bit, voltage-output
DACs are easily configured with a 3-wire serial interface.
These devices offer full 16-bit performance with less than
±20LSB integral linearity error and less than ±1LSB dif-
ferential linearity error, thus ensuring monotonic perfor-
mance. Serial data transfer minimizes the number of
package pins required. The MAX5204–MAX5207 include
control-logic circuitry, a 16-bit data-in shift register, and
a DAC register. The MAX5204–MAX5207 output is
buffered and the full-scale output voltage is V
The MAX5204–MAX5207 feature a hardware reset input
(CLR) that when pulled low clears the DAC output to
zero code 0000 hex (MAX5205/MAX5207) or resets the
DAC output to midscale code 8000 hex (MAX5204/
MAX5206). For normal operation, connect CLR to V
The MAX5204/MAX5205 (+5V supply) use an external
reference between 4V to V
MAX5207 (+3V supply) use an external reference from
2V to V
Low-Cost, Voltage-Output, 16-Bit DACs in µMAX
8
_______________________________________________________________________________________
PIN
10
1
2
3
4
5
6
7
8
9
DD
. The DAC output range is from 0 to V
NAME
DGND
AGND
LDAC
SCLK
OUT
CLR
REF
V
DIN
CS
DD
Detailed Description
Reset DAC Active-Low Input. Pull CLR low to reset the DAC output to midscale output (8000 hex) for
MAX5204/MAX5206 and to zero-scale output (0000 hex) for MAX5205/MAX5207. For normal operation,
connect CLR to V
External Reference Voltage Input
Analog Ground
Positive Supply Voltage. Bypass V
DAC Output Voltage
Active-Low Chip-Select Input
Load DAC Input
Serial Data Input
Serial Clock Input. Duty cycle must be 40% to 60%.
Digital Ground
DD
, while the MAX5206/
Reference Input
DD
.
REF
REF
(typ).
.
DD
.
DD
to AGND with a 10µF capacitor in parallel with a 0.1µF capacitor.
The MAX5204–MAX5207 digital interface is a standard
3-wire connection compatible with SPI/QSPI/
MICROWIRE and most DSP interfaces. All of the digital
input pins (CS, SCLK, DIN, CLR, and LDAC) are TTL
compatible. SCLK can accept clock frequencies as
high as 10MHz for a +5V supply and 10MHz for a +3V
or +3.3V supply.
One of two methods can be used when interfacing and
updating the MAX5204–MAX5207. The first requires
Figure 1. MAX5204–MAX5207 Simplified Functional Diagram
SCLK
LDAC
CLR
REF
DIN
FUNCTION
CS
CONTROL
LOGIC
DGND
SERIAL INPUT REGISTER
16-BIT DATA LATCH
16-BIT DAC
V
DD
Pin Description
Digital Interface
AGND
BUFFER
MAX5204–
MAX5207
OUT