MAX509BCWP-T Maxim Integrated, MAX509BCWP-T Datasheet - Page 8
![no-image](/images/no-image-200.jpg)
MAX509BCWP-T
Manufacturer Part Number
MAX509BCWP-T
Description
Digital to Analog Converters - DAC
Manufacturer
Maxim Integrated
Datasheet
1.MAX510BEWE.pdf
(22 pages)
Specifications of MAX509BCWP-T
Number Of Converters
4
Number Of Dac Outputs
4
Resolution
8 bit
Interface Type
QSPI, SPI, Serial (3-Wire, 4-Wire, Microwire)
Settling Time
6 us
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
SOIC-20
Minimum Operating Temperature
0 C
Output Type
Voltage
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Voltage Reference
External
Quad, Serial 8-Bit DACs
with Rail-to-Rail Outputs
8
______________________________________________________________Pin Description
MAX509
7, 14
_______________________________________________________________________________________
10
11
12
13
15
16
17
18
19
20
1
2
3
4
5
6
8
9
–
–
PIN
MAX510
10
11
12
13
14
15
16
1
2
3
–
4
–
5
–
6
7
8
9
–
–
REFAB
REFCD
NAME
AGND
DGND
OUTA
DOUT
OUTD
OUTC
LDAC
OUTB
REFB
REFA
SCLK
REFD
REFC
N.C.
CLR
V
V
DIN
CS
DD
SS
DAC B Voltage Output
DAC A Voltage Output
Negative Power Supply, 0V to -5V ±10%. Connect to AGND for single-supply operation.
Reference Voltage Input for DAC B
Reference Voltage Input for DACs A and B
Reference Voltage Input for DAC A
Analog Ground
Not Internally Connected
Digital Ground
Load DAC Input (active low). Driving this asynchronous input low (level sensitive)
transfers the contents of each input latch to its respective DAC latch.
Serial Data Output. Can sink and source current. Data at DOUT is adjustable to be
clocked out on rising or falling edge of SCLK.
Clear DAC input (active low). Driving CLR low causes an asynchronous clear of input
and DAC registers and sets all DAC outputs to zero.
Serial Data Input. TTL/CMOS-compatible input. Data is clocked into DIN on the
rising edge of SCLK. CS must be low for data to be clocked in.
Serial Clock Input. Data is clocked in on the rising edge and clocked out on either the
rising (default) or the falling edge.
Chip-Select Input (active low). Data is shifted in and out when CS is low. Programming
commands are executed when CS rises.
Reference Voltage Input for DAC D
Reference Voltage Input for DACs C and D
Reference Voltage Input for DAC C
Positive Power Supply, +5V ±10%
DAC D Output Voltage
DAC C Output Voltage
FUNCTION