MAX5876EVKIT# Maxim Integrated, MAX5876EVKIT# Datasheet - Page 5

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MAX5876EVKIT#

Manufacturer Part Number
MAX5876EVKIT#
Description
Digital to Analog Converters - DAC Evaluation Kit for the MAX5876/MAX5877/MAX5878
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX5876EVKIT#

Number Of Converters
2
Conversion Rate
250 MSPs
Resolution
12 bit
Interface Type
Parallel or LVDS
Supply Voltage - Max
1.89 V, 3.465 V
Supply Voltage - Min
1.71 V, 3.135 V
The dual-output channels of the MAX5876/MAX5877/
MAX5878 are configured for differential current mode to
achieve the best dynamic performance. The resistor
and transformer networks at the DAC outputs are
designed to convert the differential current signals into
single-ended voltage signals with a 50Ω output imped-
ance. When an LVDS logic-high input signal is applied
to the SELIQP/SELIQN pins, the data on the input bus
(J1 and J2) is loaded into I-DAC and the reconstructed
single-ended signal is available at the OUTPUTI SMA
connector. When an LVDS logic-low input signal is
applied to the SELIQP/SELIQN pins, the data on the
input bus is loaded into Q-DAC and the reconstructed
single-ended signal is available at the OUTPUTQ SMA
connector. When outputs OUTPUTQ and OUTPUTI are
terminated with 50Ω external loads, the full-scale output
signal level is equal to -2dBm.
To evaluate the converter’s single-ended outputs,
remove transformers T1, T2, and install SMA connec-
tors at the OUTIP, OUTIN, OUTQP, and OUTQN loca-
tions. Probe the single-ended signals at the OUTIP and
Table 1. Jumper JU2 TORB Configuration
Table 2. Reference Voltage
Table 3. JUMPER JU1 Power-Down Configuration
SHUNT POSITION
JUMPER JU3
SHUNT POSITION
SHUNT POSITION
MAX5876/MAX5877/MAX5878 Evaluation Kits
Not installed
Installed
Not installed
Not installed
1-2
2-3
1-2
2-3
_______________________________________________________________________________________
SHUNT POSITION
Connected to DVDD2
Connected to DGND
MAX5876/MAX5877/MAX5878 have an
internal pulldown resistor
JUMPER JU4
Connected to DVDD2
Connected to DGND
MAX5876/MAX5877/MAX5878 have an
internal pulldown resistor
Not installed
Installed
TORB PIN CONNECTION
PD PIN CONNECTION
Outputs
Open (REFIO becomes the output of
the internal bandgap reference)
Connected to U2 (MAX6161)
REFIO PIN CONNECTION
OUTIN SMA connectors for I-DAC. Probe the single-
ended signals at the OUTQP and OUTQN SMA con-
nectors for Q-DAC. In a single-ended configuration the
DAC output signal amplitude is equal to 1V
of the outputs.
The MAX5876/MAX5877/MAX5878 EV kits power-
down/normal operation mode can be configured with
jumper JU1. See Table 3 for jumper JU1 configuration.
The MAX5876/MAX5877/MAX5878 EV kits are 4-layer
PCB designs optimized for high-speed signals. All
high-speed digital signal lines are routed through 100Ω
differential impedance-matched transmission lines. All
analog output traces are routed through 50Ω imped-
ance-matched transmission lines. The length of these
100Ω and 50Ω transmission lines is matched to within
40 mils (1mm) to minimize layout-dependent data skew.
The PCB layout separates the digital, analog, and clock
sections of the circuit for optimum performance.
Two’s-complement digital signal input format
Offset-binary digital signal input format
Power-down mode
Normal operation
Internal 1.2V reference enabled or
connect an external reference to TP1
U2 provides a precise 1.25V voltage
reference
EV KIT FUNCTION
EV KIT FUNCTION
EV KIT FUNCTION
Power-Down Mode
PCB Layout
P-P
at each
5

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