MAX536BEWE Maxim Integrated, MAX536BEWE Datasheet - Page 13

• Manufacturer Part Number: MAX536BEWE
• Description: Digital to Analog Converters - DAC
• Manufacturer: Maxim Integrated

Specifications of MAX536BEWE

• Number Of Converters: 4
• Number Of Dac Outputs: 4
• Resolution: 12 bit
• Interface Type: QSPI, SPI, Serial (3-Wire, 4-Wire, Microwire)
• Settling Time: 3 us
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-16
• Maximum Power Dissipation: 842 mW
• Minimum Operating Temperature: - 40 C
• Output Type: Voltage
• Supply Current: 8 mA
• Supply Voltage - Max: - 5.5 V, + 16.5 V
• Supply Voltage - Min: - 4.5 V, + 10.8 V
• Voltage Reference: External

The input impedance at each reference input is code
dependent, ranging from a low value of typically 6kΩ
(with an input code of 0101 0101 0101) to a high value
of 60kΩ (with an input code of 0000 0000 0000). Since
the input impedance at the reference pins is code
dependent, load regulation of the reference source is
important.
The REFAB and REFCD reference inputs have a 5kΩ
guaranteed minimum input impedance. When the two
reference inputs are driven from the same source, the
effective minimum impedance becomes 2.5kΩ.
The reference input capacitance is also code depen-
dent and typically ranges from 125pF to 300pF.
All MAX536/MAX537 voltage outputs are internally
buffered by precision unity-gain followers with a typical
slew rate of 5V/µs for the MAX536 and 3V/µs for the
MAX537.
With a full-scale transition at the MAX536 output (0 to
8V or 8V to 0), the typical settling time to ±0.5 LSB is
3µs when loaded with 5kΩ in parallel with 100pF (loads
less than 5kΩ degrade performance).
With a full-scale transition at the MAX537 output (0 to
2.5V or 2.5V to 0), the typical settling time to ±0.5 LSB
Figure 2. Connections for MICROWIRE
*THE SDO-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX536,
**THE LDAC CONNECTION IS NOT REQUIRED WHEN USING THE 3-WIRE INTERFACE.
† THE MAX537 HAS AN INTERNAL ACTIVE PULLUP TO V
BUT MAY BE USED FOR READBACK PURPOSES.
SO R
P
MAX536
MAX537
IS NOT NECESSARY.
Voltage-Output DACs with Serial Interface
LDAC**
SDO*
_______________________________________________________________________________________
SCK
SDI
CS
5V
1kΩ
† R
Output Buffer Amplifiers
P
SK
SO
SI*
I/O
I/O
DD,
MICROWIRE
PORT
Calibrated, Quad, 12-Bit
is 5µs when loaded with 5kΩ in parallel with 100pF
(loads less than 5kΩ degrade performance).
Output dynamic responses and settling performances
of the MAX536/MAX537 output amplifier are shown in
the Typical Operating Characteristics.
The MAX536/MAX537’s 3-wire or 4-wire serial interface is
compatible with both MICROWIRE (Figure 2) and
SPI/QSPI (Figure 3). In Figures 2 and 3,
either high or low for a 3-wire interface, or used as the
fourth input with a 4-wire interface. The connection
between SDO and the serial-interface port is not neces-
sary, but may be used for data echo. (Data held in the
shift register of the MAX536/MAX537 can be shifted out
of SDO and returned to the microprocessor for data veri-
fication; data in the MAX536/MAX537 input/DAC regis-
ters cannot be read.)
With a 3-wire interface (CS, SCK, SDI) and LDAC tied
high, the DACs are double-buffered. In this mode,
depending on the command issued through the serial
interface, the input register(s) may be loaded
without affecting the DAC register(s), the DAC register(s)
can be loaded directly, or all four DAC registers may be
simultaneously updated from the input registers. With a 3-
wire interface (CS, SCK, SDI) and LDAC tied low (Figure
Figure 3. Connections for SPI/QSPI
*THE SDO-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX536,
**THE LDAC CONNECTION IS NOT REQUIRED WHEN USING THE 3-WIRE INTERFACE.
† THE MAX537 HAS AN INTERNAL ACTIVE PULLUP TO V
BUT MAY BE USED FOR READBACK PURPOSES.
SO R
P
MAX536
MAX537
IS NOT NECESSARY.
LDAC**
SDO*
Serial-Interface Configurations
SCK
SDI
CS
1kΩ
† R
P
5V
CPOL = 0, CPHA = 0
MISO*
MOSI
SCK
I/O
I/O
DD,
LDAC
SPI/QSPI
PORT
SS
can be tied
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