AT88SC0104CA-SH Atmel, AT88SC0104CA-SH Datasheet - Page 14

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AT88SC0104CA-SH

Manufacturer Part Number
AT88SC0104CA-SH
Description
EEPROM CryptoMemory, 1Kbit, 4Zone, 8SOIC, GRN
Manufacturer
Atmel
Datasheet

Specifications of AT88SC0104CA-SH

Rohs
yes
Factory Pack Quantity
12000

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11.1
11.2
Synchronous Two-wire Serial Interface
The synchronous mode is the default mode after power up. This is due to the presence of an internal pull-up on RST. For
embedded applications using CryptoMemory in standard plastic packages, this is the only available communication protocol.
Figure 11-1. Synchronous Two-wire Protocol
Note:
Asynchronous T = 0 Protocol
This power-up sequence complies to ISO 7816-3 for a cold reset in smart card applications.
The device will respond with a 64-bit ATR code, including historical bytes to indicate the memory density within the
CryptoMemory family.
Once asynchronous mode has been selected, it is not possible to switch to synchronous mode without first powering off the
device.
Figure 11-2. Asynchronous T = 0 Protocol (Gemplus Patent)
CLK-SCL
CLK-SCL
I/O-SDA
I/O-SDA
RST
RST
V cc
Power-up V
After stable V
Once synchronous mode has been selected, it is not possible to switch to asynchronous mode without first powering
V
Set I/O (SDA) in receive mode
Provide a clock signal to CLK (SCL)
RST goes high after 400 clock cycles
off the device
V cc
CC
goes high; RST, I/O (SDA) and CLK (SCL) are low
Five clock pulses must be sent before the first command is issued
CC
CC
, RST goes high also
, SCL(CLK) and SDA(I/O) may be driven
1
2
3
4
5
Atmel AT88SC0104CA [SUMMARY DATASHEET]
ATR
5200FS−CRYPTO−12/11
14

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