AT24C512C-XHD-T Atmel, AT24C512C-XHD-T Datasheet - Page 6

• Manufacturer Part Number: AT24C512C-XHD-T
• Description: EEPROM SERIAL EEPROM 512K (64K X 8) 2WIRE 2.5V
• Manufacturer: Atmel

Specifications of AT24C512C-XHD-T

• Rohs: yes
• Factory Pack Quantity: 5000

6.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see
a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition, which must precede any other
command (see
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the stop
command will place the EEPROM in a standby power mode (see
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word.
Standby Mode: The AT24C512C features a low-power standby mode, which is enabled:
Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol reset by
following these steps:
The device is ready for the next communication after the above steps have been completed.
Figure 6-1. Software Reset
SDA
SCL


1.
2.
3.
Upon power-up and
After the receipt of the Stop bit and the completion of any internal operations.
Create a Start condition
Clock nine cycles
Create another Start condition followed by a Stop condition, as shown in
Start
Bit
Figure 6-5 on page
1
8).
2
Dummy Clock Cycles
Figure 6-4 on page
3
Figure 6-5 on page
8). Data changes during SCL high periods will indicate
8
Atmel AT24C512C [DATASHEET]
Figure 6-1
9
8).
below.
Start
Bit
8720C–SEEPR–7/12
Stop
Bit
6