M95256-RCS6TP/K STMicroelectronics, M95256-RCS6TP/K Datasheet - Page 26
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M95256-RCS6TP/K
Manufacturer Part Number
M95256-RCS6TP/K
Description
EEPROM 256 Kbit SPI EEPROM 20 MHz High Speed
Manufacturer
STMicroelectronics
Datasheet
1.M95256-DFDW6TP.pdf
(53 pages)
Specifications of M95256-RCS6TP/K
Product Category
EEPROM
Rohs
yes
Instructions
6.7
Figure 15. Read Identification Page sequence
26/53
Read Identification Page (available only in M95256-D
devices)
The Identification Page (64 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode.
Reading this page is achieved with the Read Identification Page instruction (see
The Chip Select signal (S) is first driven low, the bits of the instruction byte and address
bytes are then shifted in, on Serial Data Input (D). Address bit A10 must be 0, upper
address bits are Don't Care, and the data byte pointed to by the lower address bits [A5:A0]
is shifted out on Serial Data Output (Q). If Chip Select (S) continues to be driven low, the
internal address register is automatically incremented, and the byte of data at the new
address is shifted out.
The number of bytes to read in the ID page must not exceed the page boundary, otherwise
unexpected data is read (e.g.: when reading the ID page from location 24d, the number of
bytes should be less than or equal to 40d, as the ID page boundary is 64 bytes).
The read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle. The first byte addressed can be any
byte within any page.
The instruction is not accepted, and is not executed, if a write cycle is currently in progress.
Doc ID 12276 Rev 19
M95256-W M95256-R M95256-DR M95256-DF
Table
4).