PCI-MT64-XP-N2 Lattice, PCI-MT64-XP-N2 Datasheet - Page 58
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PCI-MT64-XP-N2
Manufacturer Part Number
PCI-MT64-XP-N2
Description
FPGA - Field Programmable Gate Array PCI Master/Target 64B
Manufacturer
Lattice
Datasheet
1.PCI-MT32-O4-N2.pdf
(193 pages)
Specifications of PCI-MT64-XP-N2
Factory Pack Quantity
1
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Lattice Semiconductor
IPUG18_09.2, November 2010
Figure 2-17. 64-bit Master Burst Read Transaction with a 64-bit Local Interface
lm_burst_length[11:0]
lm_termination[2:0]
lm_burst_cnt[12:0]
l_data_out[63:32]
lm_64bit_transn
l_data_out[31:0]
lm_cben_in[3:0]
lm_cben_in[7:4]
lm_hdata_xfern
lm_ldata_xfern
l_ad_in[63:32]
lm_status[2:0]
l_ad_in[31:0]
lm_req64n
ad[63:32]
cben[3:0]
cben[7:4]
ad[31:0]
devseln
lm_gntn
lm_rdyn
framen
ack64n
req64n
par64
irdyn
trdyn
reqn
gntn
par
clk
1
2
Termination
Bus
3
Bus Length
Command
Don’t care
Don’t care
Address
( = 3 )
Bus
4
Don’t care
Don’t care
5
Don’t care
Don’t care
Address
Loading
Don’t care
Don’t care
Don’t care
6
58
Command
Don’t care
Address
Bus
Don’t care
Don’t care
7
Bus Length
Address
Parity
( = 3 )
Byte Enable 1
Byte Enable 2
8
Transaction
Data 1
Data 2
Bus
Byte Enable 1
Byte Enable 2
9
Don’t care
Don’t care
Parity 1
Parity 2
Data 3
Data 4
Data 1
Data 2
Data
Data
2
10
Parity 3
Parity 4
Data 5
Data 6
Data 3
Data 4
Data
Data
Functional Description
1
11
PCI IP Core User’s Guide
Don’t care
Don’t care
Parity 5
Parity 6
Data 5
Data 6
Data
Data
Termination
Termination
12
Normal
Bus
0
Don’t care
Don’t care
13
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