LCMXO2-256HC-4SG32IES Lattice, LCMXO2-256HC-4SG32IES Datasheet - Page 48

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LCMXO2-256HC-4SG32IES

Manufacturer Part Number
LCMXO2-256HC-4SG32IES
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 3.3V engineering sample
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-256HC-4SG32IES

Rohs
yes
Maximum Operating Frequency
269 MHz
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 40 C
sysIO Differential Electrical Characteristics
The LVDS differential output buffers are available on the top side of MachXO2-640U, MachXO2-1200/U and higher
density devices in the MachXO2 PLD family.
LVDS
V
V
V
I
V
V
V
V
V
V
I
Parameter
IN
OSD
OH
OL
OD
OS
INP
THD
CM
Symbol
OD
OS
, V
INM
Input Voltage
Differential Input Threshold
Input Common Mode Voltage
Input current
Output high voltage for V
Output low voltage for V
Output voltage differential
Change in V
Output voltage offset
Change in V
Output short circuit current
Parameter Description
OD
OS
between H and L
between high and low
OP
Over Recommended Operating Conditions
OP
or V
or V
OM
OM
V
V
V
V
Power on
R
R
(V
(V
V
OD
CCIO
CCIO
CCIO
CCIO
T
T
OP
OP
= 100 Ohm
= 100 Ohm
= 0V driver outputs shorted
- V
- V
= 3.3
= 2.5
= 3.3V
= 2.5V
Test Conditions
OM
OM
3-9
), R
)/2, R
T
= 100 Ohm
T
= 100 Ohm
DC and Switching Characteristics
MachXO2 Family Data Sheet
1.125
±100
Min.
0.05
0.05
0.90
250
0
0
1.375
1.025
Typ.
1.20
350
2.605
1.395
Max.
2.05
±10
450
2.6
2.0
50
50
24
Units
mV
mV
mV
mV
mA
µA
V
V
V
V
V
V
V

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