LFX125EB-03FH516C Lattice, LFX125EB-03FH516C Datasheet - Page 27

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LFX125EB-03FH516C

Manufacturer Part Number
LFX125EB-03FH516C
Description
FPGA - Field Programmable Gate Array Use LFX125EB-03F516C
Manufacturer
Lattice
Datasheet

Specifications of LFX125EB-03FH516C

Number Of Gates
139 K
Number Of Logic Blocks
1936
Number Of I/os
22
Operating Supply Voltage
2.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
FPBGA-516
Minimum Operating Temperature
0 C
Factory Pack Quantity
135
Lattice Semiconductor
Figure 23. LVPECL Driver with Three Resistor Pack
ispXPGA 125B/C & ispXPGA 125EB/EC External Switching Characteristics
Parameter
t
t
t
t
t
t
t
t
t
t
1. Only available for ispXPGA 125B and ispXPGA 125EB (2.5V/3.3V) devices.
CO
S
H
SINDLY
HINDLY
COPLL
SPLL
HPLL
SINDLYPLL
HINDLYPLL
Global Clock Input to
Output
Global Clock Input Setup
Global Clock Input Hold
Global Clock Input Setup
Global Clock Input Hold
Global Clock Input to
Output
Global Clock Input Setup
Global Clock Input Hold
Global Clock Input Setup
Global Clock Input Hold
ispXPLD Emulated
LVPECL Buffer
Description
Over Recommended Operating Conditions
PIO Output Register
PIO Input Register without input
delay
PIO Input Register without input
delay
PIO Input Register with input delay
PIO Input Register with input delay
PIO Output Register using PLL
without delay
PIO Input Register without input
delay using PLL without delay
PIO Input Register without input
delay using PLL without delay
PIO Input Register with input delay
using PLL without delay
PIO Input Register with input delay
using PLL without delay
1/4 of Bourns P/N
CAT 16-PC4F12
Rs
Rs
Conditions
A
27
Zo
Zo
Min.
-1.9
-3.0
2.7
3.1
0.0
0.9
5.1
0
-5
1
Max.
5.3
3.6
ispXPGA Family Data Sheet
Min.
-1.8
-2.8
2.9
3.3
0.0
0.1
1.0
5.5
-4
Max.
to LVPECL
5.7
3.9
differential
receiver
Min.
-1.5
-2.4
3.3
3.8
0.0
0.3
1.2
6.3
-3
Max.
6.6
4.5
Timing v.0.3
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns

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