1894KI-32LF IDT, 1894KI-32LF Datasheet - Page 9
![no-image](/images/no-image-200.jpg)
1894KI-32LF
Manufacturer Part Number
1894KI-32LF
Description
Ethernet ICs 3.3V 10/100 PHY RMII
Manufacturer
IDT
Datasheet
1.1894KI-32LF.pdf
(50 pages)
Specifications of 1894KI-32LF
Rohs
yes
Part # Aliases
ICS1894KI-32LF
- Current page: 9 of 50
- Download datasheet (309Kb)
PHY is capable of detecting, and that may otherwise be
undetectable by the MAC sub-layer) was detected
somewhere in the frame presently being transferred from
the PHY. RXER transitions synchronously with respect to
RXC. While RXDV is de-asserted, RXER has no effect on
the MAC.
Reduced MII (RMII) Data Interface
The Reduced Media Independent Interface (RMII) specifies
a low pin count Media Independent Interface (MII). It
provides a common interface between physical layer and
MAC layer devices, and has the following key
characteristics:
•
•
•
•
In RMII mode, a 50 MHz reference clock is connected to
REFIN(pin 30).
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
Supports 10Mbps and 100Mbps data rates.
Uses a single 50MHz reference clock provided by the
MAC or the system board.
Provides independent 2-bit wide (di-bit) transmit and
receive data paths.
Contains two distinct groups of signals: one for
transmission and the other for reception.
9
ICS1894-32
PHYCEIVER
REV M 021512
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