KSZ8841-16MVL TR Micrel, KSZ8841-16MVL TR Datasheet - Page 58

• Manufacturer Part Number: KSZ8841-16MVL TR
• Description: Ethernet ICs Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free)
• Manufacturer: Micrel

Specifications of KSZ8841-16MVL TR

• Rohs: yes
• Product: Ethernet Controllers
• Package / Case: LQFP-128
• Mounting Style: SMD/SMT

Bank 4 Wakeup Frame 0 CRC0 Register (0x00): WF0CRC0
This register contains the expected CRC values of the Wake up frame 0 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard; it is taken over the bytes specified in
the wake up byte mask registers.
Bank 4 Wakeup Frame 0 CRC1 Register (0x02): WF0CRC1
This register contains the expected CRC values of the Wake up frame 0 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard; it is taken over the bytes specified in
the wake up byte mask registers.
Bank 4 Wakeup Frame 0 Byte Mask 0 Register (0x04): WF0BM0
This register contains the first 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the first byte
of the Wake up frame 0, setting bit 15 selects the 16th byte of the Wake up frame 0.
Bank 4 Wakeup Frame 0 Byte Mask 1 Register (0x06): WF0BM1
This register contains the next 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the 17th byte
of the Wake up frame 0. Setting bit 15 selects the 32nd byte of the Wake up frame 0.
Bank 4 Wakeup Frame 0 Byte Mask 2 Register (0x08): WF0BM2
This register contains the next 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the 33rd byte
of the Wake up frame 0. Setting bit 15 selects the 48th byte of the Wake up frame 0.
October 2007
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Default Value
0x0000
Default Value
0
Default Value
0
Default Value
0
Default Value
0
R/W
RW
R/W
RW
R/W
RW
R/W
RW
R/W
RW
Description
WF0CRC1
Wake up Frame 0 CRC (upper 16 bits).
The expected CRC value of a Wake up frame 0 pattern.
Description
WF0BM0
Wake up Frame 0 Byte Mask 0
The first 16 bytes mask of a Wake up frame 0 pattern.
Description
WF0BM1
Wake up Frame 0 Byte Mask 1.
The next 16 bytes mask covering bytes 17 to 32 of a Wake up frame 0 pattern.
Description
WF0BM2
Wake-up Frame 0 Byte Mask 2.
The next 16 bytes mask covering bytes 33 to 48 of a Wake-up frame 0 pattern.
Description
WF0CRC0
Wake up Frame 0 CRC (lower 16 bits)
The expected CRC value of a Wake up frame 0 pattern.
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KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6