1894K-32LFT IDT, 1894K-32LFT Datasheet - Page 40
![no-image](/images/no-image-200.jpg)
1894K-32LFT
Manufacturer Part Number
1894K-32LFT
Description
Ethernet ICs 3.3V 10/100 PHY RMII
Manufacturer
IDT
Datasheet
1.1894KI-32LF.pdf
(50 pages)
Specifications of 1894K-32LFT
Rohs
yes
Part # Aliases
ICS1894K-32LFT
- Current page: 40 of 50
- Download datasheet (309Kb)
100M / MII Media Independent Interface: Transmit Latency
MII/100M Stream Interface Transmit Latency Timing Diagram
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
TXEN
TXCLK
TXD
TP_TX
†
unscrambled.
Shown
The table below lists the significant time periods for the MII/100 Stream Interface transmit latency. The time periods
consist of timings of signals on the following pins:
•
•
•
•
The MII/100M Stream Interface Transmit Latency Timing Diagram shows the timing diagram for the time periods.
† The IEEE maximum is 18 bit times.
Period
†
Time
TXEN
TXCLK
TXD (that is, TXD[3:0])
TP_TX (that is, TP_TXP and TP_TXN)
t1
TXEN Sampled to MDI Output of First
Bit of /J/ †
Preamble /J/
Parameter
Preamble /K/
t1
Conditions
MII mode
40
Min. Typ.
–
2.8
ICS1894-32
Max.
3
Bit times
PHYCEIVER
Units
REV M 021512
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