1893AFILFT IDT, 1893AFILFT Datasheet - Page 25
1893AFILFT
Manufacturer Part Number
1893AFILFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893AFLF.pdf
(136 pages)
Specifications of 1893AFILFT
Rohs
yes
Part # Aliases
ICS1893AFILFT
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6.1 MII Data Interface
ICS1893AF, Rev. D 10/26/04
The ICS1893AF’s MAC Interface is the Medium Independent Interface (MII) operating at either 10 Mbps or
100 Mbps. The ICS1893AF MAC/Repeater Interface is configured for the MII Data Interface mode, data is
transferred between the PHY and the MAC as framed, 4-bit parallel nibbles. In addition, the interface also
provides status and control signals to synchronize the transfers.
The ICS1893AF provides a full complement of the ISO/IEC-specified MII signals. Its MII has both a transmit
and a receive data path to synchronously exchange 4 bits of data (that is, nibbles).
•
•
Both the MII transmit clock and the MII receive clock are provided to the MAC/Reconciliation sublayer by
the ICS1893AF (that is, the ICS1893AF sources the TXCLK and RXCLK signals to the MAC/repeater).
Clause 22 also defines as part of the MII a Carrier Sense signal (CRS) and a Collision Detect signal (COL).
The ICS1893AF is fully compliant with these definitions and sources both of these signals to the
MAC/repeater. When operating in:
•
•
As mentioned in
is, it is possible to connect its MII to a MAC when power is already applied to the MAC. To support this
functionality, the ICS1893AF isolates its MII signals and tri-states the signals on all Twisted-Pair Transmit
pins (TP_TXP and TP_TXN) during a power-on reset. Upon completion of the reset process, the
ICS1893AF enables its MII and enables its Twisted-Pair Transmit signals.
The ICS1893AF’s MII transmit data path includes the following:
The ICS1893AF’s MII receive data path includes the following:
Half-duplex mode, the ICS1893AF asserts the Carrier Sense signal when data is being either transmitted
or received. While operating in half-duplex mode, the ICS1893AF also asserts its Collision Detect signal
to indicate that data is being received while a transmission is in progress.
Full-duplex mode, the ICS1893AF asserts the Carrier Sense signal only when receiving data and forces
the Collision Detect signal to remain inactive.
– A data nibble, TXD[3:0]
– A transmit data clock to synchronize transfers, TXCLK
– A transmit enable signal, TXEN
– A transmit error signal, TXER
– A separate data nibble, RXD[3:0]
– A receive data clock to synchronize transfers, RXCLK
– A receive data valid signal, RXDV
– A receive error signal, RXER
ICS1893AF Data Sheet - Release
Section 5.1.1.3, “Hot
Copyright © 2004, Integrated Circuit Systems, Inc.
Insertion”, the ICS1893AF design allows hot insertion of its MII. That
All rights reserved.
25
Chapter 6 Interface Overviews
October, 2004
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