GLS55VD020-60-I-TQWE-TM024 Greenliant, GLS55VD020-60-I-TQWE-TM024 Datasheet - Page 7

• Manufacturer Part Number: GLS55VD020-60-I-TQWE-TM024
• Description: Flash ATA Media 60MHz 3.3V Industrial
• Manufacturer: Greenliant

Specifications of GLS55VD020-60-I-TQWE-TM024

• Rohs: yes
• Data Bus Width: 16 bit
• Memory Type: NAND Flash
• Architecture: Sector Erase
• Timing Type: Synchronous
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 100 mA
• Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-100

NAND Controller
GLS55VD020
TABLE 1: P
©2010 Greenliant Systems, Ltd.
Symbol
Host Side Interface
A2
A1
A0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DMACK
DMARQ
IORDY
DDMARDY#
DSTROBE
CS1FX#
CS3FX#
CSEL
IN
A
TQFP
SSIGNMENTS
100-
53
22
23
65
66
67
68
70
71
72
73
10
11
20
14
62
24
52
56
3
4
5
6
8
9
Pin No.
VFBGA
H10
C10
F10
85-
D9
D8
D3
G1
G2
G3
H9
H8
G9
G8
D2
C3
B2
E2
E3
F2
F3
F9
E8
F8
B1
J9
(1
OF
Type
4)
Pin
I/O
O
O
I
I
I
I
I1Z/O2
Type
I2U
I1U
I1Z
O1
I2Z
I/O
O1
1
Name and Functions
A[2:0] are used to select one of eight registers in the Task File.
D[15:0] Data bus
DMA Acknowledge - input from host
DMA Request to host
IORDY: When Ultra DMA mode DMA Write is not active and the
device is not ready to respond to a data transfer request, this sig-
nal is negated to extend the Host transfer cycle. However, it is
never negated by this controller.
DDMARDY#: When Ultra DMA mode DMA Write is active, this sig-
nal is asserted by the host to indicate that the device is read to
receive Ultra DMA data-in bursts. The device may negate
DDMARDY# to pause an Ultra DMA transfer.
DSTROBE: When Ultra DMA mode DMA Write is active, this sig-
nal is the data-out strobe generated by the device. Both the rising
and falling edges of DSTROBE cause data to be latched by the
host. The device may stop generating DSTROBE edges to pause
an Ultra DMA data-out burst.
CS1FX# is the chip select for the task file registers
CS3FX# is used to select the Alternate Status register and the
Device Control register.
This internally pulled-up signal is used to configure this device as a
Master or a Slave. When this pin is grounded, this device is config-
ured as a Master. When the pin is open, or tied to V
device is configured as a Slave. The pin setting should remain the
same from Power-on to Power-down.
7
S71355-05-000
DDQ
Data Sheet
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05/10