IS25LD020-JVLE-TR ISSI, IS25LD020-JVLE-TR Datasheet - Page 14

• Manufacturer Part Number: IS25LD020-JVLE-TR
• Description: Flash 2M 2.3-3.6V 100Mhz Serial Flash
• Manufacturer: ISSI

Specifications of IS25LD020-JVLE-TR

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Flash
• Memory Size: 2 Mbit
• Architecture: Uniform
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Maximum Operating Current: 15 mA
• Operating Temperature: - 40 C to + 105 C
• Mounting Style: SMD/SMT
• Package / Case: VVSOP-8
• Organization: 256 K x 8

DEVICE OPERATION (CONTINUED)
WRITE ENABLE OPERATION
The Write Enable (WREN) instruction is used to set the Write
Enable Latch (WEL) bit. The WEL bit of the
IS25CD512/010 and IS25LD020 is reset to the write –
protected state after power-up. The WEL bit must be write
enabled before any write operation, including sector, block
Figure 6. Write Enable Sequence
WRDI COMMAND (WRITE DISABLE) OPERATION
The Write Disable (WRDI) instruction resets the WEL bit and
disables all write instructions. The WRDI instruction is not
Figure 7. Write Disable Sequence
Integrated Silicon Solution, Inc.- www.issi.com
Rev. D
2/12/2013
SIO
SIO
erase, chip erase, page program and write status register
operations. The WEL bit will be reset to the write-protect
state automatically upon completion of a write operation. The
WREN instruction is required before any above operation is
executed.
required after the execution of a write instruction, since the
WEL bit is automatically reset.
IS25CD512/010
IS25LD020
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