IS25CQ032-JKLE-TR ISSI, IS25CQ032-JKLE-TR Datasheet - Page 11

• Manufacturer Part Number: IS25CQ032-JKLE-TR
• Description: Flash 32M, 2.7-3.6V 104Mhz Serial Flash
• Manufacturer: ISSI

Specifications of IS25CQ032-JKLE-TR

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Flash
• Memory Size: 32 Mbit
• Architecture: Uniform
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 15 mA
• Operating Temperature: - 40 C to + 105 C
• Mounting Style: SMD/SMT
• Package / Case: WSON-8
• Organization: 4096 K x 8

Instruction Name
RDID
JEDEC ID READ
RDMDID
WREN
WRDI
RDSR
WRSR
READ
FAST_READ
FRDO
FRDIO
FRQO
FRQIO
MR
PAGE_ PROG
SECTOR_ER
BLOCK_ER
CHIP_ER
Quad page program
Erase suspend
Erase resume
Program information
Raw
Read information
Raw
Table 11. Instruction Set
HOLD OPERATION
HOLD# is used in conjunction with CE# to select
the IS25CQ032. When the devices are selected
and a serial sequence is underway, HOLD# can be
used to pause the serial communication with the
master device without resetting the serial sequence.
Integrated Silicon Solution, Inc.- www.issi.com
Rev. A
2/1/2013
Hex
Code
D7h/
C7h/
ABh
BBh
EBh
0Bh
3Bh
6Bh
FFh
D8h
7Ah
B1h
4Bh
9Fh
90h
06h
04h
05h
01h
03h
02h
20h
60h
32h
75h
Operation
Read Manufacturer and Product ID
Read Manufacturer and Product ID by JEDEC ID Command
Read Manufacturer and Device ID
Write Enable
Write Disable
Read Status Register
Write Status Register
Read Data Bytes from Memory at Normal Read Mode
Read Data Bytes from Memory at Fast Read Mode
Fast Read Dual Output
Fast Read Dual I/O
Fast Read Quad Output
Fast Read Quad I/O
Mode Reset
Page Program Data Bytes Into Memory
Sector Erase
Block Erase
Chip Erase
Page Program Data Bytes Into Memory with Quad interface
Program 65 bytes of Security area
Read 65 bytes of Security area
To pause, HOLD# is brought low while the SCK
signal is low. To resume serial communication,
HOLD# is brought high while the SCK signal is low
(SCK may still toggle during HOLD). Inputs to Sl will
be ignored while SO is in the high impedance state.
IS25CQ032
Comman
4 Bytes
1 Byte
4 Bytes
1 Byte
1 Byte
1 Byte
2 Bytes
4 Bytes
5 Bytes
5 Bytes
3 Bytes
5 Bytes
2 Bytes
2 Byte
4 Bytes
+ 256B
4 Bytes
4 Bytes
1 Byte
4 Bytes
+ 256B
4 Bytes
4 Bytes
d Cycle
Maximum
Frequency
104 MHz
104 MHz
104 MHz
104 MHz
104 MHz
104 MHz
104 MHz
33 MHz
104 MHz
104 MHz
104MHz
100 MHz
100MHz
104MHz
104 MHz
104 MHz
104 MHz
104 MHz
104 MHz
33 MHz
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