73S8010C-IMR/F2 Maxim Integrated, 73S8010C-IMR/F2 Datasheet - Page 15

• Manufacturer Part Number: 73S8010C-IMR/F2
• Description: I2C Interface IC
• Manufacturer: Maxim Integrated

Specifications of 73S8010C-IMR/F2

• Rohs: yes

DS_8010C_024
13 Typical Application Schematic
Rev. 1.5
NOTES:
1) VDD supply should be = 2.7V to 3.6V DC.
2) Hardwire to define address of device
3) Required if external clock from uP is used.
4) Required if crystal is used.
5) Pin can not float. Must be driven or connected to GND
6) Rext1 and Rext2 are external resistors to ground and
7) Keep L1 close to pin 5
Y1, C2 and C3 must be removed if external clock is used.
if power down function is not used.
VDD to modify the VDD fault voltage. Can be left open
PWRDN_f rom_uC
SAD0
SAD1
SAD2
Note 2
100nF
C4
See NOTE 5
C5
10uF
VDD
See note 7
R1
20K
L1
Figure 11: 73S8010C – Typical Application Schematic
10uH
10
11
12
13
14
1
2
3
4
5
6
7
8
9
73S8010C
SAD0
SAD1
SAD2
GND
GND
VPC
NC
NC
NC
PRES
I/O
AUX2
AUX1
GND
Card detection
switch is normally
closed.
VDD
Smart Card Connector
VDD_ADJ
XTALOUT
AUX2UC
AUX1UC
XTALIN
I/OUC
GND
INT_
VDD
VCC
SDA
SCL
RST
CLK
SO28
28
27
26
25
24
23
22
21
20
19
18
17
16
15
See
note 6
CLK track should be routed
far from RST, I/O, C4 and
C8.
R5
R4
Rext2
Rext1
C1
ISO7816=1uF, EMV=3.3uF
Low ESR (<1 00mohms) C1
should be placed near the SC
connecter contact
R2 2K
R3 2K
See NOTE 1
100nF
C6
AUX2UC_to/f rom_uC
AUX1UC_to.f rom_uC
IOUC_to/f rom_uC
INT_interrupt_to_uC
SDA_f rom_uC
SCL_f rom_uC
CRY STAL
73S8010C Data Sheet
External_clock_f rom uC
See NOTE 5
- OR -
Y 1
See NOTE 4
C3
See NOTE 3
C2
22pF
22pF
15