MAX98090AETL+ Maxim Integrated, MAX98090AETL+ Datasheet - Page 86
MAX98090AETL+
Manufacturer Part Number
MAX98090AETL+
Description
Interface - CODECs 5V 130mW Stereo Headphone Amp
Manufacturer
Maxim Integrated
Datasheet
1.MAX98090BETL.pdf
(166 pages)
Specifications of MAX98090AETL+
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MAX98090
Digital Microphone Frequency Compensation
The digital microphone inputs can be configured to pro-
duce a wide range of digital microphone clock frequen-
cies. To optimize performance over the entire range of
available frequencies, the device provides configurable
Figure 8. Digital Microphone Compensation Filter Frequency
Response
Table 14. Digital Microphone Configuration
www.maximintegrated.com
BIT
7
6
5
4
3
2
1
0
DIGITAL MICROPHONE COMPENSATION FILTER
DMIC_COMP[3:0]
2.5
2.0
1.5
1.0
0.5
DMIC_FREQ[1:0]
0
0 x f
RESPONSE vs. NORMALIZED FREQUENCY
S
ADDRESS: 0x14
NAME
—
—
0.1 x f
NORMALIZED FREQUENCY
S
0.2 x f
S
0.3 x f
TYPE
R/W
R/W
R/W
—
—
S
0.4 x f
POR
S
—
—
0
0
0
0
0
0
0.5 x f
DMIC_COMP = 6
DMIC_COMP = 5
DMIC_COMP = 4
DMIC_COMP = 3
DMIC_COMP = 2
DMIC_COMP = 1
DMIC_COMP = 0
DMIC_COMP = 8
DMIC_COMP = 7
S
Digital Microphone Compensation Filter Configuration
0000–1000: Figure 8 details the available compensation filter configurations.
1001–1111: Configures the compensation filter to a pass through response.
The compensation filter response scales with the sample rate up to the Nyquist
bandwidth limit (f
Digital Microphone Frequency Range Configuration
00: f
01: 3.5MHz ≤ f
If any of the system clock quick configuration bits in register 0x04 are set, then the
frequency range configuration is automatically decoded.
DIGMICCLK
DIGMICCLK
< 3.5MHz
S
/2). Automatically decoded in quick configuration mode.
frequency range and compensation settings. Once the
master clock (and thus prescaled clock) frequency is
decided, and the digital microphone clock divider is cho-
sen, the digital microphone frequency range bits should
be programmed to the correct range (DMIC_FREQ,
Table 14). If quick configuration mode is used and a
system clock bit is selected (Table 36), then the device
automatically calculates and selects the correct range
once the digital microphone clock divider is configured.
The digital microphone inputs also provide a configu-
rable frequency compensation filter with nine frequency
response settings (Figure 8). Every digital microphone
clock and sample rate combination results in a different
baseline frequency response. Table 15 to Table 20 pro-
vide the recommended compensation filter settings for
the most commonly used clock and sample rate combina-
tions. For nonstandard combinations either use the clos-
est recommended setting or choose the curve that best
fits the measured response. In quick configuration mode,
once both the system clock and sample rate bits are
selected (Table 36 and Table 37), the device automatically
selects the recommended response curve once the digital
microphone clock divider is configured. The digital micro-
phone input does not support sample rates in excess of
50kHz (where DHF = 1, Table 27).
Ultra-Low Power Stereo Audio Codec
< 4.5MHz
DESCRIPTION
—
—
10: 4.5MHz ≤ f
11: Reserved
Maxim Integrated │ 86
DIGMICCLK
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