92HD90B0X5NLGXYAX IDT, 92HD90B0X5NLGXYAX Datasheet - Page 293

• Manufacturer Part Number: 92HD90B0X5NLGXYAX
• Description: Interface - CODECs
• Manufacturer: IDT

Specifications of 92HD90B0X5NLGXYAX

• Rohs: yes
• Part # Aliases: IDT92HD90B0X5NLGXYAX

92HD98
SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
EQRAM_READ[47:40]
verb FA0/7A0
EQRAM_READ[39:32]
verb FA1/7A1
EQRAM_READ[31:24]
verb FA2/7A2
EQRAM_READ[23:16]
verb FA3/7A3
EQRAM_READ[15:8]
verb FA4/7A4
EQRAM_READ[7:0]
verb FA5/7A5
EQRAM_WRITE[47:40]
verb FA6/7A6
Register Address
Register Address
Register Address
Register Address
Register Address
Register Address
Register Address
3) When bit 6 of the EQRAM_CTRL register has been cleared, read the 48bit data from the EQRAM_READ register.
7.29.1.28. EQRAM Read Data (0x30–0x35), EQRAM Write Data (0x36–3B) Registers
These two 48-bit registers (addressed as 12 8-bit registers) are 48-bit data holding registers used
when doing indirect writes/reads to the EQRAM.
Prior to WC revision, these registers reset by POR/DAFG/ULR. WC revision, reset by POR only
Writing to NID22h verb 77F will cause NOT generate a reset to EQRAMREAD registers, it will how-
ever work for EQRAMWRITE registers.]]
7:0
7:0
7:0
7:0
7:0
7:0
7:0
Bit
Bit
Bit
Bit
Bit
Bit
Bit
EQWD[47:40]
EQRD[47:40]
EQRD[39:32]
EQRD[31:24]
EQRD[23:16]
EQRD[15:8]
EQRD[7:0]
Label
Label
Label
Label
Label
Label
Label
RW
RW
RW
RW
RW
RW
RW
Type Default
Type Default
Type Default
Type Default
Type Default
Type Default
Type Default
0x00
0x00
0x00
0x00
0x00
0x00
0x00
293
48-bit data register, contains the contents of the most recent
EQRAM address read from the RAM. The address read will
have been specified by the EQRAM Address fields.
48-bit data register, contains the contents of the most recent
EQRAM address read from the RAM. The address read will
have been specified by the EQRAM Address fields.
48-bit data register, contains the contents of the most recent
EQRAM address read from the RAM. The address read will
have been specified by the EQRAM Address fields.
48-bit data register, contains the contents of the most recent
EQRAM address read from the RAM. The address read will
have been specified by the EQRAM Address fields.
48-bit data register, contains the contents of the most recent
EQRAM address read from the RAM. The address read will
have been specified by the EQRAM Address fields.
48-bit data register, contains the contents of the most recent
EQRAM address read from the RAM. The address read will
have been specified by the EQRAM Address fields.
48-bit data register, contains the values to be written to the
EQRAM. The address written will have be specified by the
EQRAM Address fields.
Description
Description
Description
Description
Description
Description
Description
V 1.2 3/12
92HD98