MC100ELT23DG ON Semiconductor, MC100ELT23DG Datasheet - Page 2

• Manufacturer Part Number: MC100ELT23DG
• Description: IC XLATOR DL PECL-TTL DFF 8SOIC
• Manufacturer: ON Semiconductor
• Series: 100ELTr

Specifications of MC100ELT23DG

• Logic Function: Translator
• Number Of Bits: 2
• Input Type: PECL
• Output Type: TTL
• Number Of Channels: 2
• Number Of Outputs/channel: 1
• Differential - Input:output: Yes/No
• Propagation Delay (max): 5.5ns
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Supply Voltage: 4.75 V ~ 5.25 V
• Logic Type: Translator
• Logic Family: ECL
• Translation: PECL to TTL
• Propagation Delay Time: 5.5 ns
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Circuit Type: PECL to TTL
• Current, Supply: 23 mA
• Function Type: 2-Channels
• Number Of Circuits: Dual
• Package Type: SOIC-8
• Special Features: Differential
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Supply: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: MC100ELT23DGOS

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
Table 3. MAXIMUM RATINGS
Symbol
V
V
T
T
q
q
q
q
q
T
q
A
stg
JA
JC
JA
JC
JA
sol
JC
CC
I
Figure 1. 8−Lead Pinout (Top View) and Logic
D0
D0
D1
D1
Power Supply
Input Voltage
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Thermal Resistance (Junction−to−Case)
1
2
3
4
PECL
Table 2. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Diagram
Parameter
TTL
Characteristics
8
7
6
5
V
Q0
Q1
GND
Pb−Free
CC
Pb
http://onsemi.com
Oxygen Index: 28 to 34
GND = 0 V
GND = 0 V
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 2)
Human Body Model
Condition 1
Machine Model
2
TSSOP−8
Table 1. PIN DESCRIPTION
Qn
Dn, Dn
V
GND
EP
SOIC−8
CC
DFN8
Pin
V
SOIC−8
SOIC−8
SOIC−8
TSSOP−8
TSSOP−8
TSSOP−8
DFN8
DFN8
DFN8
I
 V
Pb Pkg
Level 1
Level 1
Level 1
Condition 2
UL 94 V−0 @ 0.125 in
CC
91 Devices
TTL Outputs
PECL Differential Inputs
Positive Supply
Ground
(DFN8 only) Thermal exposed pad must
be connected to a sufficient thermal con-
duit. Electrically connect to the most neg-
ative supply (GND) or leave unconnec-
ted, floating open.
> 400 V
> 2 kV
Value
50 kW
N/A
Pb−Free Pkg
Level 1
Level 3
Level 1
Function
41 to 44 ± 5%
−65 to +150
−40 to +85
41 to 44
35 to 40
Rating
0 to 6
190
130
185
140
129
265
265
84
7
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
°C
°C
°C
V
V