SAP51C-A-G1-R ZMDI, SAP51C-A-G1-R Datasheet - Page 55

• Manufacturer Part Number: SAP51C-A-G1-R
• Description: Interface - Specialized ASI
• Manufacturer: ZMDI

Specifications of SAP51C-A-G1-R

• Rohs: yes
• Product Type: Actuator Sensor Interface IC
• Operating Supply Voltage: 16 V to 34 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOP-20
• Minimum Operating Temperature: - 25 C

In Master/Repeater Mode the SAP5 provides an AS-i power-fail detector. It consists of a comparator directly
connected to the LTGP pin which generates a logic signal in case the voltage at the LTGP pin drops below
V
as follows:
Table 39: Master/Repeater Mode Parameter
Symbol
t
V
t
t
t
t
t
t
1
corresponding edge in the Manchester-code of the signal RX_DAT. The voltage trigger level for measurement
of the edge time is defined by V
ID_Code_Extension_2 EEPROM register as described in Table 38.
2
fail condition is true for a time more than t
(t
Otherwise, the RX_DAT signal returns to its idle state (logic LOW) immediately.
Data Sheet
October 20, 2011
loopback
APF_RX_DAT
APF_ON_RX_DAT
APF_APF
HOLD_APF
APF_OFF
BREAK
In Master Mode, the AS-i Power Fail state is already signaled by the RX_DAT signal as soon as the power
HOLD_APF
APF
APF
Loopback time is the time difference between an edge in the MAN code of signal TX_DAT and the
SAP5S / SAP51
Universal Actuator-Sensor Interface IC




(refer to Table 39). A subsequent digital signal processing of the comparator output signal is performed
An anti-bouncing filter removes each signal states shorter than 6s. This is to eliminate the influence
of AS-i telegrams which are added onto the AS-i DC voltage.
An additional anti-bouncing filter with different filter times for activation and deactivation of the power-
fail signal removes short power-fail pulses.
The AS-i power-fail signal is provided directly active HIGH as signal APF.
Additionally, in Master Mode, the AS-i power-fail signal modulates the RX_DAT signal, whereas the
active state is signaled by logic HIGH level.
), the power fail condition must remain true for another time period defined by t
Parameter
Loopback time in Master Mode
AS-i Power Fail voltage threshold
minimum activation time for signaling of AS-i Power
Fail by use of the RX_DAT signal
release time of the AS-i Power Fail state within the
RX_DAT signal
minimum activation time for signaling of AS-i Power
Fail by use of the APF signal
AS-i Power Fail hold time
delay time after return of the AS-i Power
break time in case of an erroneous AS-i signal
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 3.0
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
U5R
/2. The actual loopback time may be adjusted by programming the
APF_RX_DAT.
However, in order to start the APF minimum hold state
4.9
Min Max Unit
640 704
704 768
21.
64
64
64
5
9
6.5
128
23.
15
5
s
s
s
s
s
s
s
V
Note
APF_ON_RX_DAT
1
2
2
2
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