IDT74ALVCHR16601PAG IDT, Integrated Device Technology Inc, IDT74ALVCHR16601PAG Datasheet

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IDT74ALVCHR16601PAG

Manufacturer Part Number
IDT74ALVCHR16601PAG
Description
IC UNIV BUS TXRX 18BIT 56TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
74ALVCHRr
Datasheet

Specifications of IDT74ALVCHR16601PAG

Logic Type
Universal Bus Transceiver, CMOS
Number Of Circuits
18-Bit
Current - Output High, Low
12mA, 12mA
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALVCHR16601PAG
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical t
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
• V
• V
• V
• CMOS power levels (0.4μ μ μ μ μ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in TSSOP package
DRIVE FEATURES:
• Balanced Output Drivers: ±12mA
• Low Switching Noise
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2004 Integrated Device Technology, Inc.
IDT74ALVCHR16601
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
machine model (C = 200pF, R = 0)
CC
CC
CC
= 3.3V ± 0.3V, Normal Range
= 2.5V ± 0.2V
= 2.7V to 3.6V, Extended Range
SK(o)
(Output Skew) < 250ps
CLKENBA
CLKENAB
CLKAB
CLKBA
OEAB
OEBA
LEAB
LEBA
A
1
55
1
56
28
30
29
27
3
3.3V CMOS 18-BIT UNIVERSAL
BUS TRANSCEIVER WITH
3-STATE OUTPUTS
AND BUS-HOLD
CLK
CE
1D
C1
TO 17 OTHER CHANNELS
1
DESCRIPTION:
CMOS technology. The transceiver combines D-type latches and D-type
flip-flops to allow data flow in transparent, latched, and clocked modes.
OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA)
inputs. The clock can be controlled by the clock-enable (CLKENAB and
CLKENBA) inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is high. When LEAB is low, the A data is
latched if CLKAB is held at a high or low logic level. If LEAB is low, the data
is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output
enable OEAB is active low. When OEAB is low, the outputs are active. When
OEAB is high, the outputs are in the high-impedance state.
and CLKENBA.
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
This 18-bit universal bus transceiver is built using advanced dual metal
Data flow in each direction is controlled by output-enable (OEAB and
Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, CLKBA
The ALVCHR16601 has series resistors in the device output structure
The ALVCHR16601 has “bus-hold” which retains the inputs’ last state
1D
CE
C1
CLK
INDUSTRIAL TEMPERATURE RANGE
±
12mA at the designated threshold levels.
IDT74ALVCHR16601
JANUARY 2004
54
B
1
DSC-4491/5

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IDT74ALVCHR16601PAG Summary of contents

Page 1

IDT74ALVCHR16601 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS FEATURES: • 0.5 MICRON CMOS Technology • Typical t (Output Skew) < 250ps SK(o) • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, ...

Page 2

IDT74ALVCHR16601 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS PIN CONFIGURATION 1 OEAB 56 2 LEAB GND ...

Page 3

IDT74ALVCHR16601 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition –40°C to +85°C A Symbol Parameter V Input HIGH Voltage Level IH V Input ...

Page 4

IDT74ALVCHR16601 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS OUTPUT DRIVE CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL NOTE and V must be within the min. or max. range shown in ...

Page 5

IDT74ALVCHR16601 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SWITCHING CHARACTERISTICS Symbol Parameter f MAX t Propagation Delay PLH PHL t Propagation Delay PLH t LEAB LEBA to ...

Page 6

IDT74ALVCHR16601 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS (1) (1) Symbol V = 3.3V±0. 2. LOAD V 2.7 2 1.5 1 ...

Page 7

IDT74ALVCHR16601 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS ORDERING INFORMATION X XX IDT XX ALVC Temp. Range Bus-Hold Family CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 XX XXX Device Type Package PA Thin Shrink ...

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