TSV524IQ4T STMicroelectronics, TSV524IQ4T Datasheet - Page 13

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TSV524IQ4T

Manufacturer Part Number
TSV524IQ4T
Description
Operational Amplifiers - Op Amps 1.15 MHz at 5V 45uA 2.7 to 5.5V 100pF
Manufacturer
STMicroelectronics
Datasheet

Specifications of TSV524IQ4T

Product Category
Operational Amplifiers - Op Amps
Rohs
yes
Number Of Channels
4
Common Mode Rejection Ratio (min)
63 dB
Input Offset Voltage
1 mV
Input Bias Current (max)
10 pA
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
SMD/SMT
Package / Case
QFN-16
Slew Rate
0.89 V/us
Shutdown
No
Output Current
55 mA
Maximum Operating Temperature
+ 125 C
Gain Bandwidth Product
1.15 MHz
Minimum Operating Temperature
- 40 C
Supply Current
60 uA
Voltage Gain Db
106 dB

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TSV521, TSV522, TSV524, TSV521A, TSV522A, TSV524A
4
4.1
4.2
Figure 25. Input offset voltage vs. input
Application information
Operating voltages
The amplifiers of the TSV52x series can operate from 2.7 to 5.5 V. Their parameters are
fully specified for 2.7, 3.3 and 5 V power supplies. However, the parameters are very stable
in the full V
characteristics at 2.7 V. Additionally, the main specifications are guaranteed in extended
temperature ranges from -40 to +125 °C.
Common mode voltage range
The TSV52x devices are built with two complementary PMOS and NMOS input differential
pairs. The devices have a rail-to-rail input and the input common mode range is extended
from V
The N channel pair is active for input voltage close to the positive rail typically (V
to 100 mv above the positive rail.
The P channel pair is active for input voltage close to the negative rail typically 100 mV
below the negative rail to V
And between V
When the both pairs work together it allows to increase the speed of the TSV52x device.
This architecture improves a lot the merit factor of the whole device. In the transition region,
the performance of CMR, SVR, V
common mode at V
CC-
- 0.1 V to V
CC
range and several characterization curves show the TSV52x device
CC-
+ 0.7 V and V
CC
CC+
= 2.7 V
+ 0.1 V.
CC-
Doc ID 022743 Rev 1
+ 0.7 V.
CC+
io
(Figure 25
- 0.7 V the both N and P pairs are active.
Figure 26. Input offset voltage vs. input
and
Figure
common mode at V
26) and THD is slightly degraded.
Application information
CC
= 5.5 V
CC+
- 0.7 V)
13/27

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