74LVC373AD-T NXP Semiconductors, 74LVC373AD-T Datasheet - Page 4

• Manufacturer Part Number: 74LVC373AD-T
• Description: Latches 3.3V OCTAL D TRANS LATCH 3-S
• Manufacturer: NXP Semiconductors

Specifications of 74LVC373AD-T

• Product Category: Latches
• Rohs: yes
• Number Of Circuits: 8
• Logic Type: TTL
• Logic Family: LVC
• Polarity: Non-Inverting
• Number Of Output Lines: 8
• High Level Output Current: - 24 mA
• Propagation Delay Time: 3 ns at 3.3 V
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.2 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Package / Case: SO-20
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8
• Factory Pack Quantity: 2000
• Part # Aliases: 74LVC373AD,118

NXP Semiconductors
5. Pinning information
Table 2.
74LVC373A
Product data sheet
Symbol
OE
LE
D[0:7]
Q[0:7]
GND
V
Fig 6.
CC
Pin configuration for SO20 and (T)SSOP20
Pin description
GND
OE
Q0
Q1
Q2
Q3
D0
D1
D2
D3
5.1 Pinning
5.2 Pin description
10
1
2
3
4
5
6
7
8
9
Pin
1
11
3, 4, 7, 8, 13, 14, 17, 18
2, 5, 6, 9, 12, 15, 16, 19
10
20
373A
001aad090
Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state
20
19
18
17
16
15
14
13
12
11
All information provided in this document is subject to legal disclaimers.
V
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
CC
Rev. 3 — 22 November 2012
Fig 7.
Description
output enable input (active LOW)
latch enable input (active HIGH)
data input
latch output
ground (0 V)
supply voltage
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Pin configuration for DHVQFN20
index area
terminal 1
Q0
Q1
Q2
Q3
D0
D1
D2
D3
Transparent top view
2
3
4
5
6
7
8
9
GND
373A
(1)
74LVC373A
19
18
17
16
15
14
13
12
001aad089
© NXP B.V. 2012. All rights reserved.
Q7
D7
D6
Q6
Q5
D5
D4
Q4
4 of 19