74ACT373MTC_Q Fairchild Semiconductor, 74ACT373MTC_Q Datasheet - Page 2

• Manufacturer Part Number: 74ACT373MTC_Q
• Description: Latches Octal Trans Latch
• Manufacturer: Fairchild Semiconductor

Specifications of 74ACT373MTC_Q

• Number Of Circuits: 8
• Logic Type: Transparent Latch
• Logic Family: 74ACT
• Polarity: Non-Inverting
• Number Of Output Lines: 3
• High Level Output Current: - 24 mA
• Propagation Delay Time: 10 ns at 5 V
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TSSOP-20
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8

©1988 Fairchild Semiconductor Corporation
74AC373, 74ACT373 Rev. 1.5.0
Connection Diagram
Pin Description
Functional Description
The AC/ACT373 contains eight D-type latches with
3-STATE standard outputs. When the Latch Enable (LE)
input is HIGH, data on the D
In this condition the latches are transparent, i.e., a latch
output will change state each time its D-type input
changes. When LE is LOW, the latches store the infor-
mation that was present on the D-type inputs a setup
time preceding the HIGH-to-LOW transition of LE. The
3-STATE standard outputs are controlled by the Output
Enable (OE) input. When OE is LOW, the standard
outputs are in the 2-state mode. When OE is HIGH, the
standard outputs are in the high impedance mode but
this does not interfere with entering new data into the
latches.
D
LE
OE
O
0
0
–D
–O
Pin Names
7
7
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
n
Description
inputs enters the latches.
2
Logic Symbols
Truth Table
H
L
Z
X
O
of Latch Enable
0
LOW Voltage Level
High Impedance
Immaterial
HIGH Voltage Level
LE
Previous O
X
H
H
L
0
Inputs
before HIGH-to-LOW transition
OE
H
L
L
L
IEEE/IEC
D
H
X
X
L
n
www.fairchildsemi.com
Outputs
O
O
H
Z
L
n
0