74VHC373M_Q Fairchild Semiconductor, 74VHC373M_Q Datasheet - Page 2

• Manufacturer Part Number: 74VHC373M_Q
• Description: Latches Octal D-Type Latch
• Manufacturer: Fairchild Semiconductor

Specifications of 74VHC373M_Q

• Number Of Circuits: 8
• Logic Type: Latch
• Logic Family: 74VHC
• Polarity: Non-Inverting
• Number Of Output Lines: 8
• High Level Output Current: - 8 mA
• Propagation Delay Time: 14.9 ns at 3.3 V, 9.2 ns at 3.3 V
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: SOIC-20
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8

©1993 Fairchild Semiconductor Corporation
74VHC373 Rev. 1.3
Logic Symbol
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O
Latch Enable
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
0
= Previous O
LE
H
H
X
L
Inputs
0
OE
before HIGH-to-LOW transition of
H
L
L
L
IEEE/IEC
D
X
H
X
L
n
Outputs
O
O
H
Z
L
n
0
Figure 1.
2
Functional Description
The VHC373 contains eight D-type latches with
3-STATE standard outputs. When the Latch Enable (LE)
input is HIGH, data on the D
In this condition the latches are transparent, i.e., a latch
output will change state each time its D input changes.
When LE is LOW, the latches store the information that
was present on the D inputs a setup time preceding the
HIGH-to-LOW transition of LE. The 3-STATE standard
outputs are controlled by the Output Enable (OE) input.
When OE is LOW, the standard outputs are in the
2-state mode. When OE is HIGH, the standard outputs
are in the high impedance mode but this does not inter-
fere with entering new data into the latches.
n
inputs enters the latches.
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