74ACT573SJ_Q Fairchild Semiconductor, 74ACT573SJ_Q Datasheet - Page 12

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74ACT573SJ_Q

Manufacturer Part Number
74ACT573SJ_Q
Description
Latches Octal Latch
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74ACT573SJ_Q

Number Of Circuits
8
Logic Type
Latch
Logic Family
74ACT
Polarity
Non-Inverting
Number Of Output Lines
3
High Level Output Current
- 24 mA
Propagation Delay Time
10.5 ns at 5 V
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
SOP-20
Mounting Style
SMD/SMT
Number Of Input Lines
8
©1988 Fairchild Semiconductor Corporation
74AC573, 74ACT573 Rev. 1.6.0
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
NOTES:
Figure 4. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
2.54
.001[.025]
(0.97)
0.36
0.56
PIN #1
C
26.92
24.89
(Continued)
1.78
1.14
7° TYP
0.38 MIN
3.55
3.17
12
6.09
7.11
3.43
3.17
10.92 MAX
5.33 MAX
7° TYP
7.62
7.87
0.20
0.35
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