MC74ACT299DW ON Semiconductor, MC74ACT299DW Datasheet - Page 3

• Manufacturer Part Number: MC74ACT299DW
• Description: Counter Shift Registers 4.5-5.5V 8-Input
• Manufacturer: ON Semiconductor

Specifications of MC74ACT299DW

• Product Category: Counter Shift Registers
• Counting Sequence: Serial/Parallel to Serial/Parallel
• Number Of Circuits: 8
• Package / Case: SOIC-20
• Logic Family: 74ACT
• Logic Type: CMOS
• Number Of Input Lines: 8
• Output Type: 3-State
• Propagation Delay Time: 13.5 ns
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Function: Shift Register
• Mounting Style: SMD/SMT
• Number Of Output Lines: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Factory Pack Quantity: 38
• Supply Voltage - Max: 5.5 V

D−type flip−flops and the interstage logic necessary to
perform synchronous shift left, shift right, parallel load and
hold operations. The type of operation is determined by S
and S
brought out through 3−state buffers to separate I/O pins that
also serve as data inputs in the parallel load mode. Q
are also brought out on other pins for expansion in serial
shifting of longer words.
and resets the flip−flops. All other state changes are initiated
by the rising edge of the clock. Inputs can change when the
clock is in either state provided only that the recommended
setup and hold times, relative to the rising edge of CP, are
observed.
MAXIMUM RATINGS*
V
V
V
I
I
I
T
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
RECOMMENDED OPERATING CONDITIONS
V
V
t
t
T
T
I
I
1. V
2. V
IN
OUT
CC
r
r
OH
OL
, t
, t
stg
A
Recommended Operating Conditions.
J
The MC74AC299/74ACT299 contains eight edge−triggered
A LOW signal on MR overrides the Select and CP inputs
CC
IN
OUT
CC
IN
Symbol
f
f
, V
Symbol
IN
IN
1
, as shown in the Truth Table. All flip−flop outputs are
OUT
from 30% to 70% V
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
FUNCTIONAL DESCRIPTION
Supply Voltage
DC Input Voltage, Output Voltage (Ref. to GND)
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
Output Current − Low
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC V
Storage Temperature
CC
CC
or GND Current per Output Pin
; see individual Data Sheets for devices that differ from the typical input rise and fall times.
Parameter
Parameter
0
http://onsemi.com
and Q
0
7
3
V
V
V
V
V
CC
CC
CC
CC
CC
buffers and puts the I/O pins in the high impedance state. In
this condition the shift, hold, load and reset operations can
still occur. The 3−state buffers are also disabled by HIGH
signals on both S
operation.
TRUTH TABLE
MR
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
′ACT
H
H
H
H
L
′AC
A HIGH signal on either OE
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
= LOW-to-HIGH Transition
S
H
H
X
Inputs
L
L
1
S
X
H
H
L
L
0
Min
−40
2.0
4.5
CP
0
−
−
−
−
−
−
−
−
X
0
X
and S
Asynchronous Reset; Q
Parallel Load; I/O
Shift Rights; DS
Shift Left; DS
Hold
1
in preparation for a parallel load
Typ
150
−0.5 to V
−0.5 to V
5.0
5.0
8.0
40
25
10
25
−
−
−
−
−0.5 to +7.0
−65 to +150
1
Value
or OE
±20
±50
±50
7
Response
→ Q
0
CC
CC
→ Q
n
+0.5
+0.5
2
→ Q
Max
V
140
−24
7
6.0
5.5
85
24
, Q
disables the 3
CC
−
−
−
−
−
0
, Q
n
7
0
−Q
0
→ Q
→ Q
7
= LOW
6
, etc.
1
Unit
Unit
ns/V
ns/V
, etc.
mA
mA
mA
mA
mA
°C
°C
°C
V
V
V
V
V
-
state