74LVX14M_Q Fairchild Semiconductor, 74LVX14M_Q Datasheet

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74LVX14M_Q

Manufacturer Part Number
74LVX14M_Q
Description
Inverters Hex Inv w/ Schm Trig
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74LVX14M_Q

Number Of Circuits
6
Logic Family
74LVX
Logic Type
CMOS
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 85 C
Package / Case
SOIC-14
Mounting Style
SMD/SMT
Operating Supply Voltage
2 V to 3.6 V
©1993 Fairchild Semiconductor Corporation
74LVX14 Rev. 1.5.0
74LVX14
Low Voltage Hex Inverter with Schmitt Trigger Input
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
74LVX14M
74LVX14SJ
74LVX14MTC
Input voltage level translation from 5V to 3V
Ideal for low power/low noise 3.3V applications
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Number
All packages are lead free per JEDEC: J-STD-020B standard.
Order
Package
Number
MTC14
M14D
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
General Description
The LVX14 contains six inverter gates each with a
Schmitt trigger input. They are capable of transforming
slowly changing input signals into sharply defined, jitter-
free output signals. In addition, they have a greater noise
margin than conventional inverters.
The LVX14 has hysteresis between the positive-going
and negative-going input thresholds (typically 1.0V)
which is determined internally by transistor ratios and is
essentially insensitive to temperature and supply voltage
variations.
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
Package Description
February 2008
www.fairchildsemi.com

Related parts for 74LVX14M_Q

74LVX14M_Q Summary of contents

Page 1

... MTC14 Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1993 Fairchild Semiconductor Corporation 74LVX14 Rev. 1.5.0 General Description The LVX14 contains six inverter gates each with a Schmitt trigger input ...

Page 2

... Connection Diagram Pin Description Pin Names Description I Inputs n O Outputs n ©1993 Fairchild Semiconductor Corporation 74LVX14 Rev. 1.5.0 Logic Symbol IEEE/IEC Truth Table Input Output www.fairchildsemi.com ...

Page 3

... Symbol V Supply Voltage CC V Input Voltage I V Output Voltage O T Operating Temperature A Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation 74LVX14 Rev. 1.5.0 Parameter –0.5V I (1) Parameter 3 Rating –0.5V to +7.0V –20mA –0. –20mA +20mA –0. ...

Page 4

... Quiet Output Maximum Dynamic V OLP V Quiet Output Minimum Dynamic V OLV V Minimum HIGH Level Dynamic Input Voltage IHD V Maximum LOW Level Dynamic Input Voltage ILD Note: 2. Input t t 3ns r f ©1993 Fairchild Semiconductor Corporation 74LVX14 Rev. 1.5.0 V Conditions Min. CC 3.0 3.0 3.0 2 – ...

Page 5

... Input Capacitance IN C Power Dissipation Capacitance PD Note defined as the value of the internal equivalent capacitance which is calculated from the operating current PD consumption without load. Average operating current can be obtained by the eqation: I ©1993 Fairchild Semiconductor Corporation 74LVX14 Rev. 1.5 (V) C (pF) Min 2 3.3 ± ...

Page 6

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 7

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 8

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 9

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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