MAX9967BGCCQ+D Maxim Integrated, MAX9967BGCCQ+D Datasheet - Page 20
![no-image](/images/no-image-200.jpg)
MAX9967BGCCQ+D
Manufacturer Part Number
MAX9967BGCCQ+D
Description
Buffers & Line Drivers
Manufacturer
Maxim Integrated
Datasheet
1.MAX9967BRCCQTD.pdf
(30 pages)
Specifications of MAX9967BGCCQ+D
Rohs
yes
Dual, Low-Power, 500Mbps ATE
Driver/Comparator with 35mA Load
The MAX9967 dual, low-power, high-speed, pin elec-
tronics DCL IC includes, for each channel, a three-level
pin driver, a dual comparator, variable clamps, and an
active load. The driver features a -1.5V to +6.5V operat-
ing range and high-speed operation, includes high-
impedance and active-termination (3rd-level drive)
modes, and is highly linear even at low voltage swings.
The dual comparator provides low dispersion (timing
variation) over a wide variety of input conditions. The
clamps provide damping of high-speed DUT_ wave-
forms when the device is configured as a high-imped-
ance receiver. The programmable load supplies up to
35mA of source and sink current. The load facilitates
contact/continuity testing, at-speed parametric testing
of IOH and IOL, and pullup of high output-impedance
devices.
The MAX9967A provides tight matching of gain and off-
set for the drivers and offset for the comparators and
active load, allowing reference levels to be shared
across multiple channels in cost-sensitive systems. Use
the MAX9967B for system designs that incorporate
independent reference levels for each channel.
20
______________________________________________________________________________________
PIN
100
88
89
90
94
95
96
97
98
99
CPHV1
V
CPLV1
NAME
NCH1
DHV1
CHV1
DTV1
DLV1
CLV1
CH1
CCO1
Detailed Description
Channel 1 Collector Voltage Input. Voltage for channel 1 comparator output pullup resistors. For
open-collector outputs, this is the pullup voltage for the internal termination resistors. For open-
emitter outputs, this is the collector voltage of the output transistors. Not internally connected on
open-collector versions without internal termination resistors.
Channel 1 High Comparator High Output. Differential output of channel 1 high-side comparator.
Channel 1 High-Clamp Reference Input
Channel 1 Low-Clamp Reference Input
Channel 1 Driver High Reference Input
Channel 1 Driver Termination Reference Input
Channel 1 Driver Low Reference Input
Channel 1 High-Comparator Reference Input
Channel 1 Low-Comparator Reference Input
Optional internal resistors at the high-speed inputs pro-
vide compatibility with ECL, LVPECL, LVDS, and GTL
interfaces. Connect the termination voltage inputs
(TDATA_, TRCV_, TLDEN_) to the appropriate voltage
for terminating ECL, LVPECL, GTL, or other logic.
Leave the inputs unconnected for 100Ω differential
LVDS termination. In addition, ECL/LVPECL or flexible
open-collector outputs with optional internal pullup
resistors are available for the comparators. These fea-
tures significantly reduce the discrete component count
on the circuit board.
A 3-wire, low-voltage, CMOS-compatible serial inter-
face programs the low-leakage, load-disable, slew-rate,
and tri-state/terminate operational configurations of the
MAX9967.
The driver input is a high-speed multiplexer that selects
one of three voltage inputs: DHV_, DLV_, or DTV_. This
switching is controlled by high-speed inputs DATA_ and
RCV_ and mode control bit TMSEL (Table 1). A slew-rate
circuit controls the slew rate of the buffer input. Select one
of four possible slew rates according to Table 2. The
speed of the internal multiplexer sets the100% driver slew
rate (see the Driver Large-Signal Response graph in the
Typical Operating Characteristics).
FUNCTION
Pin Description (continued)
Output Driver